Sakshi, low power in digital design depends heavily on the process technology chosen. Depending on your design tools, here are some of the more successful techniques of low power implementation: clock gating, operand isolation, dynamic voltage-frequency scaling, multiple-supply voltage, power shutoff, leakage power optimization during synthesis and dynamic power optimization during synthesis.
Some of these techniques are not useful or even applicable for every design. Some of them cannot be used with if not supported by your EDA tools. I cannot upload the documents I would like to, because of copyrights. But, now that I have given you many important keywords, you can easily find helpful documents for low power implementation online.
Every stage of the design process should be performed with the low-power goal in mind. If there is a certain stage you have questions about, let me know and I will try to help.