basic digital troubleshooting

[walters]

I don't really know how to troubleshoot for digital circuits , but what are some basic digital measurements and test to do for digital chips?


1.) First measure the supply Voltage on the chip to make sure it's getting voltage or there is a short from VCC to ground that's why the chip is not working

How do I know a digital chip is or digital circuit is working?

What are some basic rule of thumbs to test for digital chips and digital circuits please?

What are some basic digital troubleshooting measurements? using a DVM meter or oscilloscope?

 

[goldsmith]

Dear walters
Hi
What kind of chip you're referring to ? and what kind of digital circuit ? if you tell me a bit more explanation , maybe i can help you .
Best Wishes
Goldsmith

 

[walters]

Just in general or basic for digital electronics chips from the 70's and 80's first just to get to know the basics on how to troubleshoot digital electronics

I'm trying to understand how to approach

Like what are some basic test procedures to test for digital electronics in general for electronic chips in the 70's and 80's?

 

[ark5230]

Step 1. Read datasheet.
Step 2. Understand and implement in Hardware.
Step 3. Check for expected output at different strategic points.
If the results are in agreement with what is expected.
Else, check the hardware implementation, debug and correct if there are errors.
If this does not work the chip could be suspected.

 

[walters]

I have a logic probe, but what tests /checks can I do with it?

At work they have logic analyzers but I don't know what kind tests or checks to do?

If I have the datasheets for each digital chip, how can I use the logic probe or logic analyzers to do what tests or checks?

 

[tpetar]

Signal Analazer (this is first version, there is version II which is stronger):

 

[BradtheRad]

Be cautious with static charge when touching things to CMOS IC's.

A logic probe (or oscilloscope) is more useful than a meter to read a digital IC's outputs. An output pin may be alternating rapidly between hi and low (unless the input is tied to ground or supply + as guidelines usually recommend). A meter will read some middle value.

Test current draw. Apply nominal supply V through some kind of current-limiting device. The wise thing is to tie all inputs to ground or supply +. It may not be convenient.

It's better not to apply less than full supply V. Undervoltage may lead to internal devices turning halfway on, causing excessive power dissipation.

Test volt levels at all pins. If all pins show a middle value between supply and ground, then suspect fused innards.

Get familiar with a good chip by testing it in basic ways. Be careful not to ruin the good chip.

 

[walters]

how do you troubleshoot each stage of a digital circuit?

Because troubleshooting analog circuit you use a sinewave function generator on the input and monitor each stages output until you find no signal

When troubleshooting digital circuits the stage or chip can be good but it not working because of other chips around the circuit

So that's why I think you have to "inject" signals on the inputs , clock, reset to make sure the outputs monitor measure right with the datasheets?

It's hard to measure the inputs of the circuit before the chip you're testing because the stage before the digital chip you're testing might need multiple chips to work properly so it does that function

It takes multiple chips for each stage to give you an output to measure

All the chips can be good when tested out of circuit but in circuit they all test bad is because each chip is relying on certain inputs or outputs of different chips. That's why digital troubleshooting for me is more complex because each digital chip inputs and outputs are connect scattered to make another digital chip trigger its inputs and outputs to function to trigger another digital chip

So the troubleshooting is not testing inputs to outputs from left to right like audio analog circuits

My problem of digital troubleshooting is how to check if a chip is good when it relying on other chips in the circuit before it or surround it to be TRIGGERED or other chips to trigger other chips in other stages or surround circuits?

because if the digital chip has multiple inputs , those input signals come from other digital chips from other stages or surround stages.

Do you de-solder each chip one by one and check the inputs and outputs compared to the datasheets

 

[BradtheRad]

* The general approach is to first check what's easy to check. Monitor the paths that will tell you the most in terms of flagging the problem.

* During development it's wise to use IC sockets.

* Try a slower clock frequency. Wait for the moment when you want to watch something change, and slow down the clock even more.

* There are multi-trace oscilloscopes, and multi-connectors that attach to every pin of an IC, so you can watch them all simultaneously.

* Look at (and perhaps change) 'enable' pin states, in case one is preventing operation.

* I picture a commercial development team having tubes full of new IC's on a shelf. They can switch out a dubious chip and see if things go right. Chips are cheap. Time isn't.

 

[walters]

The general approach is to first check what's easy to check. Monitor the paths that will tell you the most in terms of flagging the problem.

Do you know any approaches and how to monitor the paths?

Try a slower clock frequency. Wait for the moment when you want to watch something change, and slow down the clock even more.

So I sound Disconnect the circuits clock frequency and use a function generators set at a slow clock frequency?

 

[BradtheRad]

Do you know any approaches and how to monitor the paths?

Make sure all guidelines have been followed. All inputs tied to ground or supply+. All input volt levels should be inside spec limits. Etc.

Output from one chip should never be connected to an output from another chip. This might be happening if you see a volt reading at a middle value.

A middle value on a meter might also result from rapid alternating between high and low. Or a sign of fused innards.

Press your finger on each chip to see if it's overheated.

A project may have more than one stage. Test the output from a stage. If it's not what you expect, then that's the stage where you should focus your troubleshooting efforts.

So I sound Disconnect the circuits clock frequency and use a function generators set at a slow clock frequency?

That is correct.

 

[walters]

Make sure all guidelines have been followed. All inputs tied to ground or supply+. All input volt levels should be inside spec limits.

Why should I tied the inputs to ground? or the supply +? I just don't get it

Shouldn't I lift up all the input pins and inject a high or low to monitor the output of the chip?

 

[D.A.(Tony)Stewart]

There are many ways to debug logic.
1) Scope signals on each chip to see that it performs as according to logic tables, chip enable, etc as much as possible.
or use logic probe to walk around pins...
or use Logic Analyzer to clock or sample in as many signals as you can to detect correct function or incorrect function.
2) Use a KGB (known good board) and compare with bad board. Compare signals, Compare V-I curves.. See Huntron tracker or Scope emulation of same V-I curve to look for defective protection diodes on pins or abnormal leakage current etc.
3) Monitor Current on supply and use adjustable current limiter to isolate faults with events.
4) Use In Circuit Test by design
5) Use Functional Test by design
6) Use Built-in Test Equipment (BITE) Self Test with diagnostics by design
7) Etc etc ..
8) Use your finger to scan IC's for hot spots
9) scan nets with fingers to look for stray leakage sensitive faults,
10) stress board with hand held heater, and/or cold spray to isolate intermittent or faults after OK when cold.
11) Use V+ to inject a slight higher voltage to speed up logic to look for metastable faults due to slow or fast IC variation due to V+ changes or heat/cold
... did I say etc etc ??

So what's all this Stuff About Huntron?

 

[walters]

How do you find or troublshoot current leakage?

3) Monitor Current on supply and use adjustable current limiter to isolate faults with events.

So put an current meter on the supply and use an adjustable current limiter connect where and how?

I'm not sure what u mean or how to use an adjustable current limiter

9.) scan nets with fingers to look for stray leakage sensitive faults

Put my finger on chip IC pins? and see if there is leakage?

11) Use V+ to inject a slight higher voltage to speed up logic to look for metastable faults due to slow or fast IC variation due to V+ changes or heat/cold

If V+ is 5 volts , you want me to inject the V+ to 10 volts it will make the clock speed faster and the logic speed faster?

Won't that burn or fry the IC logic chips since they want V+ to be 5 volts at max

 

[D.A.(Tony)Stewart]

@walters
3) Monitor Current on supply and use adjustable current limiter to isolate faults with events.
( Use an external lab power supply with a built-in current limiter to monitor the power consumption and turn it back if under fault and find threshold where fault starts for example.)

9.) scan nets with fingers to look for stray leakage sensitive faults
Normal Logic Circuits are low impedance and not sensitive to stray capacitance or 100KΩ leakage.
Consider you find strange behavior and use your fingers makes it work. You may have found an oscillation or race condition or a metastable condition where you have forced more latency to create a stable condition.
Consider this method for difficult faults that are marginal or intermittent. It doesn't take long or if curious, test for marginal failure without fear of damage.


11) Use V+ to inject a slight higher voltage to speed up logic to look for metastable faults due to slow or fast IC variation due to V+ changes or heat/cold
[I]Notice the words "slight(ly) higher " i.e. 10% may reduce rist times, latency, prop delays enough to cause or cure a metastable fault condition. Similarity slow it down with -10%.[/I]

Note for highly accelerated life testing (HALT) professionals will analyze weakpoints in a design by designing experiments to sequence power supplies to simulate if a DC fault causes secondary damage or a power glitch causes a latchup condition and SCR effect and hundreds of other modes that reflect real world conditions in order to find any possible improvement in the quality of the design. Other tests include Thermal Soak 120'C 90%RH 24 hrs, Vibration & Shock , random vibration & THermal shock, Cable pull tests, drop tests, etc etc as part of DVT plan..

 

[walters]

3) Monitor Current on supply and use adjustable current limiter to isolate faults with events.
( Use an external lab power supply with a built-in current limiter to monitor the power consumption and turn it back if under fault and find threshold where fault starts for example.)

So you want me to "Raise" the current until I see a fault?

Won't raising the current to high burn out or fly the IC chips?

What is the difference between a power supply that has a current output VS a current limiter?

The circuit is going to draw current to make it turn on and work , plus the IC chips need some current

If I raise the current the IC chips, transistors will heat up causing problems

11) Use V+ to inject a slight higher voltage to speed up logic to look for metastable faults due to slow or fast IC variation due to V+ changes or heat/cold
Notice the words "slight(ly) higher " i.e. 10% may reduce rist times, latency, prop delays enough to cause or cure a metastable fault condition. Similarity slow it down with -10%.

ok raising the voltage 10% is dangerous i would think because the IC chips and transistors will get hot

---------- Post added at 05:28 ---------- Previous post was at 05:27 ----------

3) Monitor Current on supply and use adjustable current limiter to isolate faults with events.
( Use an external lab power supply with a built-in current limiter to monitor the power consumption and turn it back if under fault and find threshold where fault starts for example.)

So you want me to "Raise" the current until I see a fault?

Won't raising the current to high burn out or fly the IC chips?

What is the difference between a power supply that has a current output VS a current limiter?

The circuit is going to draw current to make it turn on and work , plus the IC chips need some current

If I raise the current the IC chips, transistors will heat up causing problems

11) Use V+ to inject a slight higher voltage to speed up logic to look for metastable faults due to slow or fast IC variation due to V+ changes or heat/cold
Notice the words "slight(ly) higher " i.e. 10% may reduce rist times, latency, prop delays enough to cause or cure a metastable fault condition. Similarity slow it down with -10%.

ok raising the voltage 10% is dangerous i would think because the IC chips and transistors will get hot

 

[D.A.(Tony)Stewart]

Walters have you ever seen a power supply with an adjustable current limiter? YOu turn the current down to starve the supply, not increase the current .
If a fault exists then reduce the voltage instead to see if it is voltage sensitive (ie nonlinear) or simply a linear short.

Your experience is obviously different than mine, but 10% on an overclocked CPU might be excessive, but not for a CPLD.

May I suggest more wisdom in choosing a method or value in my instructions, rather than the absurd..

 

[walters]

Yes I have but now i know what u mean sorry

If a fault exists then reduce the voltage instead to see if it is voltage sensitive (ie nonlinear) or simply a linear short

.

If a circuit is voltage sensitive is mean? there is a short? from V+ to ground?

If a circuit is current sensitive is mean?

 

[D.A.(Tony)Stewart]

Here is another Logic debugging tool http://www.hpl.hp.com/hpjournal/pdfs/IssuePDFs/1976-12.pdf
If Function or performance changes drastically with Voltage or the current total is very Supply sensitive, = "Voltage sensitive" This can be measured. e.g. Say it is a DC DC converter. Sensitivity of In to Out .. measure Delta In/ Delta Out using 2% or so... if ratio is <<1 then low sensitivity... or S(v,f) Sensitivity of output frequency w.r.t. V+.. or S(f,I) Sensitivity of supply current w.r.t clock frequency input... If this is very non-linear, it may indicate a problem.

 

[walters]

My logic debugging problem is

When IC chips are not doing anything unless they are triggered

It's hard for me to understand the circuit to know who to find which IC chips work together or how they work together since they rely on eachother for the triggering or getting triggers from other IC chips or pushbuttons or switches

How would I be able to troubleshoot these kinds of logic circuits?

Like I worked at a electronic Redemption game place.

There logic was triggered logic circuits