Balun test using two port network analyzer

[wizardz]

test balun

I want to test some three port on-chip baluns using two-port network analyzer.
The test results should include the insertion loss, coupling coefficient, amplitude and phase inbalance. So a simple connection as a two port transformer in test is not adequate.
Some papers indicate that typical test set up include:
1. test each partial two port with a third port terminated with a 50 Ohm terminator.
2. test each partial two port with a third port open, (I don't know whether this works, but a paper used this way)
3. some combination of back to back connection of balun. Maybe the insertion loss is easily obtained, but I wonder whether amplitude or phase imbalance information is included?

If any one has some balun test experience and can help me, I would be high appreciated.

 

[Mazz]

balun test

What I have done is the first option.
By definition S-par are valid in this configuration (the unused port terminated with 50 Ohm).
Then I used a software to merge the 3 s2p files into one s3p, simply removing the redundant measurements.
From s3p file you can calculate/simulate the balun insertion loss & umbalance.

If you use Agilent ADS, there is an example project that shows the whole procedure.

I hope it can help.

Mazz

 

[toonafishy]

insertion loss balun site:edaboard.com

#1 works well if the device is well bahaved. I have use it many times for baluns and combined the 2 port files mathmatically to make a 3 port file. Compared it to a differerntial network analyzer and the results are very close.

 

[wizardz]

balun testen

Thankyou for reply, I want to add more information that I am not quite clear.

How is 50 Ohm terminated to a pad on wafer, I think there should be some GSG probe and Transmission Line?

What I am dealing with is a transformer balun, with impedance transformation ratio of 4:1, 2:1 or something. Will the 50 Ohm test port introduce more loss, or is there some matched S parameters instead?

 

[Mazz]

balun network analyser

On wafer termination with GSG probe can be a problem.
You should provide a phisical resistor on the unused port (so make different balun version on chip). I don't know if there are other ways (maybe deembedding?)

For impedance ratio there is no problem: S-par are defined in 50 ohm systems.
Of course, if you terminate the 200 Ohm differential port(for example in a 4:1 balun) with 50 Ohm you will have higher losses.
But, if you complete your s3p file with the described procedure, and then you terminate the balun with proper impedance (200 Ohm in my example) you'll get the correct results.
I hope it can help.
Mazz

 

[wizardz]

transformer two port network

Thankyou again, Mazz.
But I think it is unlikely that we connect a 50 Ohm resistor terminator on-chip as the partial two port measurements require connecting/disconnecting of the terminator.

Typical paper dealing with such on-chip test include:
Y. J. Yoon, Y. J. Yoon, L. Yicheng, R. C. Frye, M. Y. A. L. M. Y. Lau, P. R. A. S. P. R. Smith, L. A. A. L. Ahlquist, and D. P. A. K. D. P. Kossives, "Design and characterization of multilayer spiral transmission-line baluns
Design and characterization of multilayer spiral transmission-line baluns," Microwave Theory and Techniques, IEEE Transactions on, vol. 47, pp. 1841-1847, 1999.
But the paper mentions little about the equipment set up.

I also noticed a paper using partial two port and a third open measurement technique, I don't know whether this works.

H. Kai-Ye, H. Kai-Ye, H. Chia-Jen, and L. Len-Yi, "Modeling methodology of integrated five-port balun using two-port RF measurement
Modeling methodology of integrated five-port balun using two-port RF measurement," in Radio Frequency integrated Circuits (RFIC) Symposium, 2005. Digest of Papers. 2005 IEEE, 2005, pp. 295-298.

 

[wizardz]

how to test balun

Anyone more advice?
I have to solve this problem as soon as possible.

 

[mckinson]

baluns for rf network analyzer

I think this way just can transfer the S2p to S3p ,right ?

 

[wizardz]

adsl network test baluns

to mckinson,

of course, the partial 2 port to 3 port tranform also includes some technique to overcome mismatch due to nonideal loads.

I still wonder the on-wafer test method???