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Hi
I am trying to build an analyzer for Automotive Voltage Regulators (AVR), which will determine the type and the preset cut-off voltage.
Basically, there are 2 types..... PNP circuit with Positive output and NPN circuit with Negative output. Very basic circuits of both types are attached for quick reference.
When a DC ramp is applied to a PNP-AVR, the output will also be a ramp until the cut-off voltage is reached. At cut-off voltage, the output will drop instantly to almost zero. On the contrary, when a DC ramp is applied to an NPN-AVR, the output will be below 1V until the cut-off voltage is reached. At cut-off voltage, the output will shoot instantly to the cut-off voltage and continue to rise further. The output behaviors can be understood with the help of diagram attached.
The schematic for the proposed analyzer is also attached. Initially when the circuit is powered on the ramp generator will constantly be supplying 5V. These 5V will be enough to power on the AVR (under observation). An output of about 5V will activate the PNP LATCH circuit and light up the green LED indicating the AVR is PNP type. An output below 1V will activate the NPN LATCH circuit and light up the blue LED indicating the AVR is NPN type. Next, closing the switch at top-right will generate ramp which will be feed into the AVR.
Before going for the physical assembling, I am trying to simulate in LTSpice. However, the output from the AVR if feeded directly into the Op Amp, does not allow to generate the ramp. If a diode is connected, the ramp is OK. However, the voltage after the diode is increased, which fails the schematic. I want to know if this is a real issue or only limited with LTSpice. If it's real how to resolve it. For reference the simulation output is also attached.
By the way, suggestions to the improve the schematic will also be appreciated.
Thanks for the help.
I am trying to build an analyzer for Automotive Voltage Regulators (AVR), which will determine the type and the preset cut-off voltage.
Basically, there are 2 types..... PNP circuit with Positive output and NPN circuit with Negative output. Very basic circuits of both types are attached for quick reference.
When a DC ramp is applied to a PNP-AVR, the output will also be a ramp until the cut-off voltage is reached. At cut-off voltage, the output will drop instantly to almost zero. On the contrary, when a DC ramp is applied to an NPN-AVR, the output will be below 1V until the cut-off voltage is reached. At cut-off voltage, the output will shoot instantly to the cut-off voltage and continue to rise further. The output behaviors can be understood with the help of diagram attached.
The schematic for the proposed analyzer is also attached. Initially when the circuit is powered on the ramp generator will constantly be supplying 5V. These 5V will be enough to power on the AVR (under observation). An output of about 5V will activate the PNP LATCH circuit and light up the green LED indicating the AVR is PNP type. An output below 1V will activate the NPN LATCH circuit and light up the blue LED indicating the AVR is NPN type. Next, closing the switch at top-right will generate ramp which will be feed into the AVR.
Before going for the physical assembling, I am trying to simulate in LTSpice. However, the output from the AVR if feeded directly into the Op Amp, does not allow to generate the ramp. If a diode is connected, the ramp is OK. However, the voltage after the diode is increased, which fails the schematic. I want to know if this is a real issue or only limited with LTSpice. If it's real how to resolve it. For reference the simulation output is also attached.
By the way, suggestions to the improve the schematic will also be appreciated.
Thanks for the help.