Automatic Insertion of Level Shifters at Gate-Level

[Lightning19]

Hello,

I am using Synopsys tools in creating a design flow for a standard cell library. The library contains two versions of the same cells, but they operate at two different supply voltages. The library also includes a level shifter.

I generate the gate-level netlist using only a single supply voltage, and then have a script that runs to automatically update some of the gates to the second supply voltage.

Is there a way to automatically insert the level shifter from the library whenever it is required?

Thanks.

 

[jbeniston]

Yep - Have a look at UPF, for specifying power http://www.unifiedpowerformat.com/

 

[Lightning19]

I don't see how this really applies to the level shifter insertion that I was looking for...

Is there a way to insert the level shifters without moving to a different format than the gate-level netlist with Design Compiler environment in which I am currently working?

 

[rca]

normaly upf is made to automaticly insert level shifter (isolation, retention...) during the simulation/synthesis phases, and to indicate to all backend tools, the power constraints.