atmega external ram
What's wrong with the info shown inside datasheet ?
http://www.atmel.com/dyn/resources/prod_documents/doc2467.pdf
The interface consists of:
• AD7:0: Multiplexed low-order address bus and data bus.
• A15:8: High-order address bus (configurable number of bits).
• ALE: Address latch enable.
• RD: Read strobe.
• WR: Write strobe.
Use an 74AC573 latch due to the high-speed operation of XRAM interface.
Start with two wait cycles during read/write and one wait cycle before driving out new address.
If succesful decrease the wait cycles down to no-wait states.
Setings according to page 30 of data sheet.
You can find an example software on page 33 of datasheet.
A list of recommended SRAM devices can be found on page 12 of
STK501
and additional info about interfacing external SRAM to ATmega128.
This is an addon board for STK500 in order to support ATmega128.
The schematics of STK500 can be found here:
http://instruct1.cit.cornell.edu/courses/ee476/AtmelStuff/STK500_Schematics.pdf