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ATE testing of LPDDR controller

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tiger_std

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Anyone know how the LPDDR controller is tested on ATE (traditional function test method or BIST)? I tested a DDR1 (250Mbps) on ATE with traditional functional test method. The pad of DDR1 is SSTL2 (2.5V) but the pad of LPDDR is LVCMOS (1.8V). I am worrying about the driving capability of LPDDR pad (is it able to drive load board trace and ATE channel?).

Any input is appreciated.

--Bill
 

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