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at89s8253 spi port problem,help

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Yoking

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at89s8253 edaboard

check this c51 code example:
why the *ptr pointer parameter point to ROM data ,it work correctly!(no need to let:p0=0xff)
but it work incorrectly when pointer point to external RAM?(Penomena:always missing the high four bits in one byte),but if adding that clause:p0=0xff,it work correctly!!!

how to resolve the proble?cause P0 port has been occupied for another using in my circuit!

note:when i used the spi port to send data,i've encountered the same problem:i have to add this clause: P0=0xff!!

eagerly waiting for your help, thanks!


sbit clk=P1^7;
sbit dat=P1^5;

void shift(unsigned char code *ptr){
unsigned char c,temp1;
temp1=~*ptr;
for(c=0;c<8;c++){
if((temp1&0x80)==0)
{ dat=0;}
else
{ dat=1;}
clk=0;
_nop_();
_nop_();
// delay();
clk=1;
_nop_();
_nop_();
// delay();
temp1<<=1;
}
}
 

silvio

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using the spi interface on at89s8253

Yoking said:
Penomena:always missing the high four bits in one byte

What do you mean by "missing" ? They are either "1" or "0". If they are not as you're expecting to be don't means are missing.

Read the page 3,4 and 5 of this document : 80C51 Family Hardware Description
under I/O configuration.

If it's something you don't get it, comeback (with details about what is fitted on your port P0) and I'll try to explain it accordingly.
 

Yoking

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at89s8253 spi

silvio said:
Yoking said:
Penomena:always missing the high four bits in one byte
If it's something you don't get it, comeback (with details about what is fitted on your port P0) and I'll try to explain it accordingly.


thanks silvio!

1: the high four bits in one byte are always "1" thats 0xfx( hex)

2:i have readed these kind of PDF file a thousand times! i have no idea about the relation between the SPI operation and P1=0xff?
can you explaint?(check the attachment ) thanks,:|
 

silvio

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add a spi port

Can you post the all diagram ?

Yoking said:
i have no idea about the relation between the SPI operation and P1=0xff?
can you explaint?

Why performing a bit-bang when you have SPI hardware interface implemented in AT89S8253 ?

In the above doc it's clearly stated that some pins can use alternate functions (look at port P3 configuration which is very similar with port P1 of AT89S8253.
In order to allow using those functions, a "1" logic must be writen to the coresponding pin.
If the output latch has received a "0" at D input during the previous access of the port, then it will be hard to use it in alternate function since one of the input of NAND gate is held at "0".
It's obvious why you need to write a "1" before using alternate function or using the port regardless of the previous write to it.
 

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