;-------------------------------------------------------------------------------------------------------------------------------------------------------
;HEAD
...
org 0023h ;vector address for serial interrupt
ljmp serial_int
...
;-------------------------------------------------------------------------------------------------------------------------------------------------------
;MAIN PROGRAM
...
clr SM0
setb SM1 ;UART mode 1 (8-bit variable)
clr SM2 ;no multi processor mode
setb REN ;enable serial reception
;set baud rate to 4800
mov BRL,#178
mov BDRCON,#00000110b ;set RBCK (internal bdr-generator for reception), fast generator (SPD)
orl PCON,#1000000b ;set SMOD1 without touching the rest of the bits
setb ES ;enable serial interrupt
orl BDRCON,#00010000b ;set BRR to start generator without touching the rest of the bits
...
;-------------------------------------------------------------------------------------------------------------------------------------------------------
;SERIAL INTERRUPT
serial_int:
jnb RI,ri_not_set ;jump if RI flag is not set, otherwise...
clr RI ;...since we are here, the last interrupt was a reception, RI is now set – thus clear RI
mov A,SBUF ;...store received signal in accu
movc A,@A+dptr ;...indirect indexed addressing of table, store in accu
mov P0,A ;...send content of accu to port 0 (in this case, there's a 7-segment-display I'm trying to gate)
sjmp end_serial ;...jump to return
ri_not_set:
clr TI ;since we are here, the last interrupt was a transmission, TI is set – thus clear TI
end_serial:
reti ;we're done here, return to main program
The movc A,@A+dptr after mov A,SBUF is puzzling to me.
From Keil: The MOVC instruction moves a byte from the code or program memory to the accumulator.
A = (A + DPTR).
This will overwrite SBUF transfer into A.
mov dptr,#Table
and somewhere below that
Table:
db 0x82, 0x6B, 0x98 0x28, 0xE1, 0x24, 0x84, 0x6A
db 0x80, 0x20, 0x00, ...
OK..
Is master interrupt enabled and TXD/RXD cross connected?
XD
Can you post your full code and circuit? Which pins are the RX and TX? If the post which has Rx and Tx is P3 then clear P3 in the initialization. In C it is P3 = 0x00;
You clear P3 in assembly. Are the baudrates of the 2 mcu's same?
$NOMOD51 ;deactivate pre-defined 8051 registers
$include (reg_C5131.inc) ;include this file instead
code_s segment code
cseg at 0000h ;address of first command
ljmp begin ;large jump in 64k address space
org 000bh ;vector address Timer 0
ljmp timer0_int
org 0023h ;vector address serial interrupt
ljmp serial_int
org 0100h ;start address program
rseg code_s ;code segment, variable position
;-------------------- Initialisierung ----------------------------------------
begin:
mov dptr,#Table
; timer initialization
mov tmod,#1 ;initialize timer
mov th0,#0x00
mov tl0,#0x00
setb et0 ;enable timer 0 interrupt
setb tr0 ;start timer
; initialize and start watchdog
mov wdtprg,#011b ;initialize watchdog
mov wdtrst,#0x1e ;start watchdog
mov wdtrst,#0xe1
; initialization for serial input
clr SM0
setb SM1 ;UART mode 1 (8-bit, variable)
clr SM2 ;no multi processor mode
setb REN ;enable serial reception
mov BRL,#178 ;baud rate is 4800
mov BDRCON,#00000110b ;set RBCK for internal baud rate generator, set SPD for fast generator
orl PCON,#10000000b ;set SMOD1 without touching the rest of pcon
setb ES ;enable serial interrupt
orl BDRCON,#00010000b ;start baud rate generator
setb EA ;enable all interrupts
;-------------------- Main program -------------------------------------------
loop1:
orl PCON,#00000001b ;set idle mode
sjmp loop1
;-------------------- Interrupt routines -------------------------------------
;TIMER INTERRUPT 0
timer0_int:
clr tr0
mov th0,#0x00
mov tl0,#0x00
setb tr0
mov WDTRST,#0x1E
mov WDTRST,#0xE1
reti
;serialER INTERRUPT
serial_int:
jnb RI,ri_not_set ;jump if RI flag not set, else...
mov A,SBUF ;...load content of serial buffer into accu
movc A,@A+dptr ;...read Table
mov P0,A ;...load content of accu into P0
clr RI ;...clear RI
sjmp end_serial ;...jump to return
ri_not_set:
clr TI ;clear TI flag (if RI == 0)
end_serial:
reti
;-------------------- Display gates ------------------------------------------
Table: db 0x82, 0x6b, 0x98, 0x28, 0xe1, 0x24, 0x84, 0x6a
db 0x80, 0x20, 0x94, 0x00
;-----------------------------------------------------------------------------
END
;Gating a 7 segment display via AT89C5131 contoller
;On start, display shows 0
;On pushing button R3, display will increment
;On pushing R3 while display is "9", a flashing "E" will be displayed
;Any value displayed will be sent via serial interface
$NOMOD51 ;deactivate pre-defined 8051-registers
$include (reg_C5131.inc) ;include this file instead
int_z equ r7 ;interrupt counter
errorbit equ 0x00 ;error bit, if 9 is displayed and interrupt occurs
displaybit equ 0x01 ;if error is displayed
code_s segment code
cseg at 0000h ;address of first command
ljmp begin ;large jump in 64k address area
org 0003h ;vector address external interrupt 0
ljmp ex0_int
org 000bh ;vector address timer 0
ljmp timer0_int
org 0023h ;vector address serial interrupt
ljmp serial_int
org 0100h ;start address of program
rseg code_s ;variable code segment
;-------------------- Initialization ----------------------------------------
begin:
mov dptr,#Zifftab
; initialize timer
mov int_z,#7 ;interrupt counter
mov tmod,#1 ;timer initialization
mov th0,#0x00
mov tl0,#0x00
setb et0 ;Timer Interrupt 0 freigeben
setb tr0 ;Timer starten
setb ex0 ;enable external interrupt 0
setb it0 ;set external interrupt to low flank
; initialize serial output
clr SM0
setb SM1 ;UART modus 1 (8-bit, variable)
clr SM2 ;no multi processor mode
mov BRL,#178 ;set baud rate to 4800
mov BDRCON,#00001110b ;set TBCK 1 for internal bdr generator, SPD to 1 for fast bdrg
orl PCON,#10000000b ;set SMOD1
setb ES ;enable serial interrupt
orl BDRCON,#00010000b ;start baud rate generator
; start and initialize watchdog
mov wdtprg,#011b ;initialize watchdog
mov wdtrst,#0x1e ;start watchdog
mov wdtrst,#0xe1
clr errorbit ;clear error bit
clr displaybit ;clear error display bit
; output 0 on P0 (this is for 7 segment display)
clr A
movc A,@A+dptr
mov P0,A
inc dptr
; output 0 on TxD (this is for serial transmission)
clr A
movc A,@A+dptr
mov SBUF,A
inc dptr
setb EA ;enable all interrupts
;-------------------- Main program ------------------------------------------
loop1:
orl PCON,#00000001b ;set idle mode
sjmp loop1
;-------------------- Interruptroutinen --------------------------------------
;EXTERNAL INTERRUPT 0
ex0_int:
clr A
movc A,@A+dptr ;read from zifftab
jz error_bit ;IF accu = 0, jump to error_bit (jz automatically compares accu)
mov P0,A ;...ELSE output value of zifftab on P0...
inc dptr ;...and increment data pointer in any case...
clr A
movc A,@A+dptr ;...and read from zifftab again (now for serial output)...
mov SBUF,A ;...and output value on TxD...
inc dptr
sjmp end_ex0 ;...jump to the end in any case
error_bit:
setb errorbit ;...accu was 0? THEN set error bit
end_ex0: reti
;TIMER INTERRUPT 0
timer0_int:
clr tr0 ;stop timer
mov th0,#0x00 ;reload timer starting value
mov tl0,#0x00
setb tr0 ;restart timer
mov wdtrst,#0x1e ;reset watchdog
mov wdtrst,#0xe1
djnz int_z,end_t0 ;decrement int_z and IF int_z != 0, jump to end_t0...
mov int_z,#7 ;...ELSE reinitialize int_z...
jnb errorbit,end_t0 ;...and IF error bit not set (0), jump to end_t0...
jnb displaybit,e_notset ;...ELSE IF display bit not set (E not displayed) jump to e_notset...
e_set:
mov p0,#0xff ;...ELSE deactivate display bit
clr displaybit ;...and clear display bit (means E is not displayed)
sjmp end_t0 ;...and jump to the end
e_notset: mov p0,#0x94 ;...display bit is not set? Then display E...
setb displaybit ;...and set display bit (means E is displayed)
end_t0: reti
;SERIAL INTERRUPT
serial_int:
clr TI
end_serial:
reti
;-------------------- Tabellen -----------------------------------------------
Zifftab: db 0x82, 0, 0x6b, 1, 0x98, 2, 0x28, 3
db 0xe1, 4, 0x24, 5, 0x84, 6, 0x6a, 7
db 0x80, 8, 0x20, 9, 0x00
Errortab: db 'ERROR'
;-----------------------------------------------------------------------------
END
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