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Asynchronous Fifo depth calculation and burst

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Jun 21, 2011
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I need to design a asynchronous fifo , data rate is 90Kbps , and data width is 64bit . writing freq is 15M and reading 10M .
could you help me to calculate the Depth of the fifo.
How can we calculate the parameter burst, from this information .
Please help me ppm of a write and read frequency sources has a severe impact on my fifo ?

Thanks and Regards
Unnikrishnan KM

Yes , two clocks are there write clk and read clock.
Could you help me in this regard.

it really depends when you are going to read and write.
at 1400 word/s, thats not really a lot of data.

But with a slow read clock than write clock, you cannot put data in on every clock cycle.

two clear factors come up -- the longest sustained burst for writing, and the longest sustain holdoff for reading. these are given by the source/destination of the data.

eg, if you write 1MB at a time, then wait for several minutes, you will have a low average data rate. but the fifo will need to be large. Likewise, if the read process must wait for several minutes, you will be able to fill up a large fifo before any reads occur. If both conditions occur, you would need a 1MB buffer.

When the data rate is approximately uniform, the fifo sizes can be minimized. in this case, to the point where a minimum sized fifo is ok. eg, a 256 word 18kb BRAM for an FPGA, or a 16 word distributed ram.

could you please make it clear, or could you point out any papers/books that could help me in this regard .
ppm difference of clocks would be affecting the fifo depths again, I believe.

it is the data rate thats important, not the PPM difference in the clock.
Port A could be clocked 300Mhz with port B at 10MHz, aslong as port A isnt written very often, you only have to look at how big the burst is to see how deep you need the FIFO.

what if the read burst size is different from write burst size, i.e. read is 32bits while write is 64bits ?

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