Continue to Site

Welcome to EDAboard.com

Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.

asyn fifo: primetime STA analysis

Status
Not open for further replies.

openwindows

Junior Member level 3
Joined
Jan 18, 2002
Messages
28
Helped
0
Reputation
0
Reaction score
0
Trophy points
1,281
Activity points
102
sta analysis

i need add the command:set_false_path for my asyn fifo 2 clocks of my design when i do primetime STA analysis in my PT script?
 

fifo sta

you can reference the Clifford E. Cummings's paper
Synthesis and Scripting Techniques for Designing Multi-Asynchronous Clock Designs.

Hopes this helps!
 

sta analysis apr

can you upload this paper ???
 

sta fifo

you no need to add the tow async clock to you set_false_path, just gray coded write pointer and read pointer, is ok.
 

Status
Not open for further replies.

Part and Inventory Search

Welcome to EDABoard.com

Sponsor

Back
Top