Assura RCX extracted view is not showing metal layers in IC5141USR1

[anannya]

Hi,
I am using Assura RCX to carry out parasitic extraction of an inverter layout. Cadence icfb version I am using is IC5141USR1. The tool is extracting the layout successfully, but the extracted view shows NMOS and PMOS symbols in place of metal layers. Parasitics (resistors and capacitors) symbols are present in the extracted view, but it does not show any metal layers.
Can anybody throw some light, why is it so?

I saw a couple of previous posts mentioning about setting the valid layers from LSW, but that doesn't help.

Thanks.
Ananya

 

[erikl]

... setting the valid layers from LSW, but that doesn't help.

Did you include the extracted layers (e.g. M1 ext in addition to M1 dwg - depending on your setUp)?

 

[dick_freebird]

Setting -which- valid layers is probably key. If you don't
know which, then make them all valid and all visible so
you can see what there is, coming out of extract. You
would think that the foundry PDK uses purposed layers
for their purpose, but that comes down to cases.

 

[anannya]

Hi,
I set them as all layers valid and visible to make them visible in ext view, but it doesn't fix the extracted view which shows the pmos and nmos device symbols. However, the simulation team is ok as far as they are getting the parasitic values in the view. So thanks for your inputs...