Hello, I keep getting the above error when attempting to run Assura DRC on a simple layout of an inverter. I am using IBM 90nm technology.
Additionally, here are some of the errors in the Cadence terminal:
*No tech lib map file 'assura_tech.lib' or 'pvtech.lib' found.
*No rule sets can be created because there are no defined Assura technologies. To define an Assura technology, create an assura_tech.lib file.
DEFINE {techName}{techDir}
.
.
.
WARNING: lost connection to avlck for lock/usr/local/ibm-90/IBM_PDK/cms9flp/Assura/DRC/inverter.dat.lck
I've tried numerous troubleshooting methods, and have made no progress. Any tips at all would me much appreciated! Thanks.