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Assertions are concise means of capturing your design intent/specifcation, they can be used with Simulation and Formal verification, there is lot of introductory stuff available on the net, use google. I myself have coauthored 2 books on Assertion based Verification, see: www.noveldv.com and www.abv-sva.org for details.
Well some what simulatenous posting, see the other thread:
Relevant portion is here:
There are several technologies available such as:
* CRV - Constrained Random Verification
* CDV - Coverage Driven verification
* ABV - Assertion Based Verification
We cover all this and much more with practical labs, tricks and techniques, BKMs (Best Known Methods) in our course: Comprehensive Functional Verification (CFV), see: www.noveldv.com for more. TO sign up for a class, send an email to email@example.com This will be in Bangalore for now, but if there is enough mass we are open to do it in other parts of India as well.