digesh055
Newbie level 4

Hi,
I am using questa sim.
While checking assertion, It is showing pass in the waveform, but its showing fail in log file.
Assertion logic is right and signals is also behaving right.
I am using questa sim.
While checking assertion, It is showing pass in the waveform, but its showing fail in log file.
Assertion logic is right and signals is also behaving right.