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If you are using Certify, it's pretty straight forward. You only have to change your code if you want to use special FPGA features like BlockRAM, DCM etc.
Look here at "Certify" section : **broken link removed**
Wish it was that easy!!. rakko, what it the speed of the clocks, and what is the maximum number of logic levels in your part. This will help determine the xilinx part that you want to target.
Just finished doing a few of these myself. If you have any question, PM me.
Yes, robotman, it's THAT EASY with Certify, especially if your prototype has multiple FPGAs. Usually prototypes run at 1/2 ASIC speed. Xilinx has 2 families suitable for ASIC Prototyping : Virtex-E(M) and VirtexII. Virtex-E speedgrade 6 runs a little faster than VirtexII grade 4. So unless you need some specific feature of VirtexII, price is your major consideration.
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