ASIC/SoC verification seminar in Pune on 15th May

[mayankatacadence]

Scaling your Verification Environment from IP’s to SoC’s: Tools and Techniques
(FREE SEMINAR)



Date & Venue





Date:
Thursday, May 15, 2008

Time:
10.00am – 4.30pm

Location:
Majestic II

Le Meridien Pune




Agenda




Topic

10:00 am
Cadence Verification Solutions Overview

10:50 am
Incisive Unified Simulator Demo

11:00 am
Low power verification using CPF (including demo)

12:30 pm
Lunch

1:30 pm
Incisive Formal Verifier Presentation

3:00 pm
Tea/Coffee break

3:15 pm
Open Verification Methodology (OVM) with Demo




REFER YOUR FRIENDS TO THE EVENT AND

WIN CADENCE ENDORSED LAPTOP BAGS!!



To refer your friend to the event, forward this email invite to your friend. They need to register by forwarding this email to jyothsna (at ) cadence (dot) com or mayank (at) cadence (dot) com. If their registration is accepted and they attend the event, their registration qualifies for the prize. Top two referrers will win Cadence endorsed laptop bags.ss



Register Now!

 

[Manoj Singh]

Dear Mayank / Jyotsna

We would be interested in sending few of the engineers from our company to attend this seminar.

Please let me know you’re contact details to register for them.


Thanks & Regards!

Manoj Singh
Silicon Interfaces
a software and vlsi design center

Email: manoj@siliconinterfaces.com
Website: www.siliconinterfaces.com