architecture of sigma delta ADC/DAC for audio application?

[Btrend]

sigma delta adc 14 bit architecture

There is always difference between theoretical & pratical limit in analog IC design.
Could someone give me some figure or estimation about the degradation of sigma delta ADC/DAC from the ideal (theoretical) SNR calculation using different architecture as shown below?
I found the SNR estimation in text book as:
[Modulator (MOD) , Oversampling Ratio (OSR)]
In theorey:
MOD order =2, OSR=128 ==> SNR ~ 95db ==> 15 bit
MOD order =3 , OSR=128 ==> SNR ~ 120dB ==> 19 bit
Real IC implementation :
MOD order =2, OSR=128 ==> SNR ~ ---- db ==> -- bit
MOD order =3 , OSR=128 ==> SNR ~ ---- dB ==> -- bit

 

[borodenkov]

sigma delta dac dem

The real SNR will depend on implementation issues - the most important is which power consumption is allowed? If low power consumption is necessary, it can be difficult to achieve high SNR.

if you have access to IEEE, I'd recommend you to search for the latest papers in this area and compare results..

 

[bbqsky]

medeiro1.pdf+sigma delta

If the sigma delta DAC is one bit PWM output, the real SNR is same as the simulatiom result, becase both the interpolation filter and modulator are realize in digital. If the DAC is multibit output, we can use DEM .. to reach the SNR Matlab simulation.


See the book "analog integrated circuit design"

best regard

 

[nickooeda]

best dac architecture for audio applications

ADC degradation is more than DAC,the reason like above.

A good book:delta-sigma converters ,IEEE press

 

[swicap]

audio sigma-delta matlab dac

Real snr will depend on how good u control the noise. SNR estimated in text book considered
only quantization noise.

 

[rfic]

sigma delta adc matlab

I want to study ADC, Please give me some advice?

 

[markty]

adc dac architecture

If the sigma delta DAC is one bit PWM output, the real SNR is same as the simulatiom result, becase both the interpolation filter and modulator are realize in digital. If the DAC is multibit output, we can use DEM .. to reach the SNR Matlab simulation.


See the book "analog integrated circuit design"

best regard

Well, I agree. In the digital domain, the result will behave just like the system (matlab) simulation.
But can u give some info about the degradation in the analog parts. The filter will limit the performance.

 

[beargebinjie]

the ideal formular on consider the Q noise, but the real adc contain many other noise,such as flicker thermal kt/c noise, and the real snr is also dependent your layout and process, medeiro1.pdf is a good material for design considerations, and you can find it in the forum.