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Architecture level Optimization for ASIC

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jayakumarjay

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Can anyone tell the best architectures for the basic elements like adder ,

accumulator, multiplier.

i found that wallace tree multiplier is the best multiplier architecture

anyone can comment on it
 

it depends upon your area/timing requirements ..

for low area .. ripple carry adder
for better timing . carry lookahead adder..

someother adders (like csa)are also available in DW .. DC will choose according to your constraint reauirements.

About Multiplier ..Wallace tree arch is good for high timing requirements... but the total area is high due to lots of CSA adders....

I recently designed a multiplier which is combination of Radix4 and Wallace tree..

c this paper..
**broken link removed**


Radix4 booth recoding reduces the number of partial products .. while CSA adders helps in keep the timing..
 

**broken link removed**
a good site for computer arithmetic
 

hi,
a book name "low power cmos design" maybe helpful for you.
 

Computer organization & Design the hardware/software interface
by David A. Patterson, John L. Hennessy
 

Hi,
Every existing architecture has its own advantages and disadvantages. When you are choosing among different architectures, you should consider about the following:
1)timing(maximum frequency)
2)area(related to your die size and costs)
3)power
4)the back-end deisgn for a certain architecture

So,I am afraid there is no "best" architecture in ASIC design.It just depends on your spec and requirements
 

i am agree with eexuke!
 

The best architecture is that
that is used in the module library
which is provided by this or that technology.
That modules are specially optimized for speed or power on demand.
And the customer will try a lot of efforts to achieve similar results.
 

don't worry , as u synthesis , u can select which kind perform u wanted ... the tool work well
 

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