I am having trouble with it, when I try the following :
"...
include "~/rpolyp.scs" section=typ
..
...
dc1 dc param=temp start=-10 stop=150 step=10
..
...
alter_rmin altergroup {
include "~/rpolyp.scs" section=rmin
dc2 dc param=temp start=-10 stop=150 step=10
}
alter_rmax altergroup {
include "~/rpolyp.scs" section=rmax
dc3 dc param=temp start=-10 stop=150 step=10
}
..
..."
I get an error as shown in the attached .out file.
The input .scs file is also attached.
(It is not a path problem. I am actually using an absolute path, not the
tilda shown for convenience in the example above. The deck does simulate
correctly without the altergroup statememtns.)
Thanks for asking.
Actually, we have figured out what the problem is.
The problem is with the rpolyp.scs model file.
Altergroup excepts only model, instance and subcircuit statements,
which covers a lot of ground; however, there are statements in the
model file which are not accepted by altergroup. So, we will need to
modify the model file.
Of course, due to NDA restrictions, I cannot post the model file here.
Have you tried to put the resistor models as "inline subckt" rather than "subckt". This will alleviate the problem of not being able to read resistors. So change it and add these things in your model file. You can get a smooth run