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anyone have ideas about the memory design in silicon ensembl

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shiningblue

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I use ARTISAN to generate RAM, and get the LEF file. But it doesn't work well.

The tool is silicon ensemble. I import the LEF file of cell library first, and then import the LEF file of memory, It always said "Invalid token here OR missing space between token and ":""

It drives me crazy.
 

how did u generate RAM using Artisan.
Artisan gave any tool for generating RAM.
or r u using synopsys memory compiler?
 

Please check your LEF file version. SE does not recognize high version of LEF 5.5 5.6, 5.4(not sure).
And check the LEF file, the space need to be added in front of ';' in each line
 

Re: anyone have ideas about the memory design in silicon ens

Thanks for the reply

ARTISAN has the memory generator which can generate SRAM, ROM and Registerfile

Added after 2 minutes:

zhustudio said:
Please check your LEF file version. SE does not recognize high version of LEF 5.5 5.6, 5.4(not sure).
And check the LEF file, the space need to be added in front of ';' in each line

The version of LEF file of memory is 5.2, which should be able to be run at silicon ensemble.

also the space has been added in front of ';' in each line

anyone has any ideas?
 

Re: anyone have ideas about the memory design in silicon ens

Hi
I am using CCAR, (Cadence chip assembly router) in Solaris 8, with ic4.46, but the lic dosent work so I am getting SILICON ENSEMBLE, or GATE ENSEMBLE instead.

I found the keys in my current license.dat for SILICON ENSEMBLE and GATE ENSEMBLE, but I dont know where can I download them, anyone got idea?

I can exchange everything I have for this software even though you just tell me a download link that works.

I have: IC5141, IC5033, ASSURA, CALIBRE 2006(UNIX), CALIBRE 2005(LINUX + UNIX) CALIBRE 2004, TSMC .25UM, 0.18UM, LEDIT 11.1, and many more include tutorial books.........

all are cracked working version (or have working lic.).
just name it what you want. let me know : gpsfan#gmail.com
 

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