Continue to Site

Welcome to EDAboard.com

Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.

anybody can explain carrier recovery and timing recovery

Status
Not open for further replies.

yakinlu

Newbie level 6
Joined
Nov 13, 2004
Messages
12
Helped
2
Reputation
4
Reaction score
1
Trophy points
1,283
Activity points
142
Can anybody explain carrier recovery and timing recovery of DQPSK.
I kown there are component as: PED,LOOP filter,NCO and complex multipler.
What kind of architeture of both carrier recovery and timing recovery of DQPSK?
 

i used to use a pll in verilog
 

get the gardner book on pll

has chapter on clock and timing recovery as well as carrier recovery.
also try haykin communications texts
 

carrier recovery is for synchronization
timing recovery is picking the time instant within the symbol period which provide you the highest SNR
 

Status
Not open for further replies.

Part and Inventory Search

Welcome to EDABoard.com

Sponsor

Back
Top