Any tricks for long transistor layout?

[aboriginemm]

I need small value gm so the length of the transistor is really small.
For example, W/L=3u/18u.
Any suggestions of layout of such long length transistors?
Thanks!

Added after 1 hours 50 minutes:

Is it good to divide length into several segments?
Or just use one wide finger?
Which way is better?
Never do such long length transistor, need help!

 

[JoannesPaulus]

you should put several transistors in series (I'd use 18 of them: 3u/1u).

 

[aboriginemm]

Thanks for the reply.
I simulated the circuit with divided transistors in series according to layout. It gave different result from using one long channel transistor. Which result is more realistic?

 

[dick_freebird]

Splitting into segments will match models better, in
the case that there are significant drain-voltage-
dependent nonlinearities. As might be found on SOI
processes. The segmentation is basically a tall cascode stack.

But there may also be peculiar behaviors in the
"middle nodes" especially if the operating current is
low; these nodes each have a {SD}-B capacitance
and a high driving impedance effectively, so there
may be more lag, substrate / well noise injection,
etc.

It kind of depends on the quality of modeling and the
nastiness to be modeled, how close you get.

 

[JoannesPaulus]

I simulated the circuit with divided transistors in series according to layout. It gave different result from using one long channel transistor. Which result is more realistic?

As dick_freebird said, the split transistor design should give you better match with your models. A long transistor - depending on the frequency of operation - will also exhibit effects that are not captured by the model (such as gate resistance).