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any instruction for delay

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j hemangini

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I want to give fixed 10ms delay in any code . How can i write this in vhdl code ?
Is there any direct instruction?
please reply.
 

hi,

u can use "after 10ms" if u r interested only in simulating ur design, bcz its not synthesizable. Else u may need to write a code either using counter of shift reg to generate particular delay with respect to clock.
 

If you have a faster clock and the you can use a FIFO to hold the data...
 

I can't understand the question..
I mean VHDL is not a programming language..
Think what you wanna do in terms of flip-flops and memory and then write..
If you wanna do something after 10ms, you need to instanziate a counter that trigger after 10ms and use the counter value to start your event.
 

u can use after ,wait to generate delays...but these are not synthesizable ...
 

why should you do that?

BTW every book that handles VHDL demonstrates at least the 'after' instruction and also tells that this function is not synthesisable (i.e. cannot be implemented in real hardware)
 

If you are asking in hardware point of view then this is the answer.
There is no instruction in any HDL to get a specified delay from hardware.
To get a specified delay you need to use a counter in your code. From that you have to calculate the counter value with reference to your clock period.
 

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