Antenna diodes explanation

[cellphone]

antenna diode

Could you please explain to me why you need antenna didoes:
1. Why would there be a charge build up during manufacturing that can occur at the gates of these nmos and pmos
2. What polarity is this charge?
3. What kind of diodes (i.e. n diodes or p diodes) to use at these gates?
4. Is there any kind of detailed literature that I can read?

Thank you very much!!

 

[cellphone]

antenna diodes

no inputs?

 

[chang830]

antenna diode

Could you please explain to me why you need antenna didoes:
1. Why would there be a charge build up during manufacturing that can occur at the gates of these nmos and pmos
2. What polarity is this charge?
3. What kind of diodes (i.e. n diodes or p diodes) to use at these gates?
4. Is there any kind of detailed literature that I can read?

Thank you very much!!

The "design of analog cmos integrated circuits" book by Razaivi, Page.634 will exlains part of u questions.

 

[mubeen630]

diode antenna

Cellphone,
please check the link below:

**broken link removed**

 

[swathi.kamath]

what is an antenna diode

cellphone wrote:
Could you please explain to me why you need antenna didoes:
1. Why would there be a charge build up during manufacturing that can occur at the gates of these nmos and pmos
2. What polarity is this charge?
3. What kind of diodes (i.e. n diodes or p diodes) to use at these gates?
4. Is there any kind of detailed literature that I can read?

Thank you very much!!


Hi cellphone

Whenever the metal area connecting the poly is wider, it forms an antenna and in effect there will be charge accumulation in this area. this charge can be of ±polarity and that is the reason we connect a p diode( to VDD) as well as a n diode(to VSS). If it is a negative charge that is accumulated, the n diode conducts and the charge is grounded and viceversa.

Regards
Swathi

 

[vbhupendra]

antenna protection diode

Antenna diodes are leakage diodes which helps in flow extra charge (accumulated on gate of small transitors ) to the ground.

 

[k_90]

antenna diode what is it

Antenna rules are required by some IC manufacturers to ensure that the transistors of the chip are not destroyed during fabrication. In such processes, the wafer is bombarded with ions in order to create the polysilicon and metal layers. These ions must find a path through the wafer (to the substrate and active layers at the bottom). If there is a large area of poly or metal, and if it connects ONLY to gates of transistors (not to source or drain or any other active material) then these ions will travel through the transistors. If the ratio of the poly or metal layers to the area of the transistors is too large, the transistors will be destroyed due to a build up of charge.

Nothing to do with noise!

To eliminate these errors make sure there are no long lengths of the same signal metal.
Check your design rules for the maximum wire lenght allowed.

example
metal 1 metal 1 metal 1 metal 1 >>>> change to >>>> metal metal2 metal3 metal4 metal3 metal2 metal1

 

[CK815]

what is antenna diode

Antenna diodes are required to protect the gate oxide of mos transistors from charge during wafer fabrication.

Polysilicon and metal layers are (nowadays- formerly wet processes were used) etched by means of plasma processes. Plasma etching can lead to charge built- up in metal traces. If these metal traces are connected to a gate, the gate oxide might be damaged if the charge is too high (the wafer itself is kept at the opposite potential of the plasma). Depending on plasma potential, etch time and geometrical factors, a ratio of metal- area/perimeter to gate- area can be calculated that can collect a charge high enough to damage the gate oxide. To drain the charge, a path has to be created by means of diodes. Some processes only require a "zener" diode to ground for protection. But that depends strictly on the process.

Regards,

C.

 

[mdcui]

diode protection antenna

to make a super flat device layer structure, moder processing use a lot of CMP (chemical mechanical polishing) process (CMP), the wafer will swirl at high speed under certain atmosphere, during which static charge will accumulate on anything that does not have a path to ground on top of wafer, the metals which is hooked up with CMOS device gate is a good target, if the accumulated charge is too much, then the big voltage potential between the gate and channel will break it. meanwhile all the meatals hooked up with the source/drain will not have this problem since the charge can find a path to substrate and will not accumulate.