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another strange problem

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lhlbluesky

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i have designed a voltage divider circuit with a buffer and a resistor divider,
the input is from the PTAT(about 1.24V),when the generated reference voltage Vcm
(0.9V)is connected to the actual circuit(a pipelined adc in sample phase),the value of Vcm changes a little(about 16mV),so the circuit can't work properly;
later i find that the current in the resistor above and below Vcm node is different,
the lower end is larger,the current of the upper end is 0.7uA,and the lower end is 1.5uA;i think the difference comes from the output of the main opamp,why?
how to solve it?
 

this is my circuit,V1 and V2 is exact,but vcm is not ,i think this is caused by leakage current of main opamp.ok?
just look at it.
thank you all.

Added after 17 seconds:

 

the second opamp is cmos folded cascodede opamp.
pls look at it again
 

I think it should not be the leakage.
It is not so large.
 

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