[SOLVED] And-Or-Invert (AOI) for XOR gate

[IamNew]

Hi there, I am deal with the And-Or-Invert (AOI) of the XOR gate. But I not sure what I draw is appropriate or not.

 

[goldsmith]

Dear Friend!
Hi
Your out put will be A+B)+(A'+B')
Best Wishes
Goldsmith

 

[kumarji]

Dear Friend

Hi

The output is A'B+AB', as you mentioned.

 

[goldsmith]

Friends
See below please:
((A'*B')*AB)'=(A'B')'+(AB)' =(A+B)+A'+B'
Respect
Goldsmith

 

[subbuindia]

Hi there, I am deal with the And-Or-Invert (AOI) of the XOR gate. But I not sure what I draw is appropriate or not.

Here is my gate drawing:

**broken link removed**

There is 2 inverters at the 1st AND gate. I just want to know if I am in the right way of drawing an AOI model.
Please advice. Thanks

Hi friend......



As per my knowledge, your gate output is correct what you want.........

How means, we know the inverter of XNOR gate is XOR gate. Accroding to your circuit, if you replace NOR gate by OR gate then you can get XNOR output. But, here the output is XOR because we are using the NOR gate.


Hope, You got this.....

 

[goldsmith]

Oh sorry i thought that your out put gate is nand. yes it is correct . ( the final gate is nor ) . ok it is correct.
Again Sorry

 

[subbuindia]

Friends
See below please:
((A'*B')*AB)'=(A'B')'+(AB)' =(A+B)+A'+B'
Respect
Goldsmith

Hi friend.......

Given gate is NOR gate....

NOR gate output is : (A+B)' for A, B are inputs of NOR


So accroding to given diagram, we can get ((A'*B') + AB)'=(A'B')' * (AB)' =(A+B)(A'+B')=A'*B+A*B'

Hope, You got this.........

 

[IamNew]

Oh sorry i thought that your out put gate is nand. yes it is correct . ( the final gate is nor ) . ok it is correct.
Again Sorry

So, is it ok if I put 2 inverter to the 2 inputs in the AND gate? Will it violated the AOI design rule?

 

[subbuindia]

So, is it ok if I put 2 inverter to the 2 inputs in the AND gate? Will it violated the AOI design rule?

Hi friend.......

Would you elaborate your question?

Thank you....

 

[IamNew]

Hi friend.......

Would you elaborate your question?

Thank you....

Alright. My question is, I would like to design an And-Or-Invert (AOI) gate. So, is it anything wrong the way I design the gate as above? Because I see most of the AOI gate, they just involving the AND gate and NOR gate but no NOT gate is involve.

I just worry there is rule on designing the AOI gate which cant be violated.
Thanks

---------- Post added at 10:32 ---------- Previous post was at 10:31 ----------

Hi friend.......

Would you elaborate your question?

Thank you....

Sure. My question is, I would like to design an And-Or-Invert (AOI) gate. So, is it anything wrong the way I design the gate as above? Because I see most of the AOI gate, they just involving the AND gate and NOR gate but no NOT gate is involve.

I just worry there is rule on designing the AOI gate which cant be violated.
Thanks

 

[yadavvlsi]

AOI stand for AND-OR-INVERTER. NOR is OR+INVERTER. A NOR gate requires less area compared to using individual OR and INVERTER .
AND-OR-Invert - Wikipedia, the free encyclopedia.

 

[subbuindia]

Alright. My question is, I would like to design an And-Or-Invert (AOI) gate. So, is it anything wrong the way I design the gate as above? Because I see most of the AOI gate, they just involving the AND gate and NOR gate but no NOT gate is involve.

I just worry there is rule on designing the AOI gate which cant be violated.
Thanks

---------- Post added at 10:32 ---------- Previous post was at 10:31 ----------



Sure. My question is, I would like to design an And-Or-Invert (AOI) gate. So, is it anything wrong the way I design the gate as above? Because I see most of the AOI gate, they just involving the AND gate and NOR gate but no NOT gate is involve.

I just worry there is rule on designing the AOI gate which cant be violated.
Thanks

Friend .........
As per my knowledge, there is no violation in your circuit. Because, we want XOR output by using AND, OR, INVERT gates...
They may use NOR gate instead of OR, INVERT gates........

 

[IamNew]

Friend .........
As per my knowledge, there is no violation in your circuit. Because, we want XOR output by using AND, OR, INVERT gates...
They may use NOR gate instead of OR, INVERT gates........

Thank you for the explanation. :smile: