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analog PLL questions (missing DC feedback for PLL amplifier)

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liletian

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Hi Guys
I found the attached PLL diagram. I am confused since there is no DC feedback for the amplifier which will definitely make the PLL misfunction. I only see R3,R4,C1 forms the necessary AC filter, however, without a DC feedback, it is not going to work. Can anyone help to explain the attached phase locked loop and also add the missing DC feedback of the amplifier in the graph?
Thanks
 

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RCinFLA

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There actually is DC feedback provided by the VCO/Phase detector.

Often there is a 'bleeder' resistor included to ensure cap starts out at zero volts.
 

liletian

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I do not think the VCO/phase detctor can provide the necessary DC feedback. I believe there should be a DC feedback directly in the above pic.
What is a bleeder resitor and where should it locate?
Thanks
There actually is DC feedback provided by the VCO/Phase detector.

Often there is a 'bleeder' resistor included to ensure cap starts out at zero volts.
 

biff44

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Well, you can think what you wish, but that is the dc feedback path. The op amp is an integrator, and is a very common PLL loop filter circuit. Without feedback, it would simply go to one of the supply rails a millisecond after you turn on the power supply.
 

liletian

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Well, you can think what you wish, but that is the dc feedback path. The op amp is an integrator, and is a very common PLL loop filter circuit. Without feedback, it would simply go to one of the supply rails a millisecond after you turn on the power supply.
Well, I agree without feedback, it will go to one of the supply rails. That is why I am asking this question in the first place.
But can you explain the DC path you describe? I can not find a DC path in this way.
Thanks
 

rho-bot

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Imho the phase detector maybe a simple EXOR gate. The Opamp acts as a lowpass/integrator.
The DC feedback is the charge collected on C1.
A bleeder resistor may be placed parallel to C1, but will increase phase jitter...
 

liletian

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Imho the phase detector maybe a simple EXOR gate. The Opamp acts as a lowpass/integrator.
The DC feedback is the charge collected on C1.
A bleeder resistor may be placed parallel to C1, but will increase phase jitter...
Single Cap can not be treated as DC feedback
A resistor in parallel with C1 will form a DC feedback, can you explain more how to choose value of bleeder resistor?
Also, why will it increase the phase noise/jitter?
Thanks
 

biff44

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The phase detector is usually actually a phase/frequency detector. It has the capability to determine if the frequency of the VCO is higher or lower than the input reference frequency. It also, once they are at the same frequency, to output a voltage proportional (+/-) to the phase difference between the VCO and the reference input.

So you turn on the power supply. The VCO starts oscillating. The VCO feeds one input to the phase detector, the reference oscillator feeds the other input. The phase detector then tells the loop filter if the VCO frequency is too high or too low, and outputs an appropriate voltage. That voltage either charges UP or DOWN the integrator. As the integrator output moves either up or down, the VCO frequency does the same. Eventually the loop filter forces the VCO frequency, and then its phase, to "lock" to the reference input. That is the "DC feedback"

Rich
 
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liletian

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Hi Rich
Thanks for the reply. I understand your description. However, for OP-am a little off the voltage will drive the op-am into supply rail and misfunction. So how could you guarantee that your DC-offset is low enough to not drive the op-am into supply rails?
It looks like to me that this mechnanism is very unstable unless a real DC-offset is provided.
I did simulate this PLL, for an ideal op-am, it does work. However, as long as I put a mosfet-based un-ideal op-am, it begins to mis-function.
Thanks,

The phase detector is usually actually a phase/frequency detector. It has the capability to determine if the frequency of the VCO is higher or lower than the input reference frequency. It also, once they are at the same frequency, to output a voltage proportional (+/-) to the phase difference between the VCO and the reference input.

So you turn on the power supply. The VCO starts oscillating. The VCO feeds one input to the phase detector, the reference oscillator feeds the other input. The phase detector then tells the loop filter if the VCO frequency is too high or too low, and outputs an appropriate voltage. That voltage either charges UP or DOWN the integrator. As the integrator output moves either up or down, the VCO frequency does the same. Eventually the loop filter forces the VCO frequency, and then its phase, to "lock" to the reference input. That is the "DC feedback"

Rich
 

tony_lth

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Using OpAmp integrator in PLL is very common, and the integrator is dynamic against the VCO drifting duing to the temperature, voltage drifting, etc.
That circuit is much better than DC feedback.
 

rho-bot

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However, for OP-am a little off the voltage will drive the op-am into supply rail and misfunction. So how could you guarantee that your DC-offset is low enough to not drive the op-am into supply rails?
The phase detector outputs not an analog voltage, but a steady PWM signal, which is lowpassed to generate the VCO voltage. This circuit is very common, but has some disadvantages (steady phase deviation, see here p.12ff)
In an active lowpass, there is no need for a dc feedback.
 

liletian

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The phase detector outputs not an analog voltage, but a steady PWM signal, which is lowpassed to generate the VCO voltage. This circuit is very common, but has some disadvantages (steady phase deviation, see here p.12ff)
In an active lowpass, there is no need for a dc feedback.
1. So in this diagram, the phase detector is a digital phase detector? Can this structure be used in analog phase detector applications?
2. I think about it, suppose in the beginning,the nagative input for the amplifier is zero, the the output goes to the power rail, the VCO is thus generated a very high frequency, the PDF will capture the difference and generate a high voltage, that voltage will keep charge the capacitor to increase the voltage at negative input of the amplifier. It maybe make sense. But does it only work with digital PFD?
3. what condition does the amplifier work? It jump from one power rail (high) to another power rail (ground) and gradually reach the voltage level of of the reference voltage(voltage at positive pin of amplifier)?
4. or the amplifier's output will just keep jumping and its average voltage is equal to the reference voltage when the PLL is locked?
Thanks
Thanks guys

---------- Post added at 00:50 ---------- Previous post was at 00:39 ----------

unless the phase detector is always monopoly in any case(most likely a PFD), otherwise how can you guarantee than the output voltage of the mixer clways increase in one direction?
For example, an analogy phase detector can not guarantee that the PD output is mono direction. (sin(phase difference).
Thanks
The phase detector is usually actually a phase/frequency detector. It has the capability to determine if the frequency of the VCO is higher or lower than the input reference frequency. It also, once they are at the same frequency, to output a voltage proportional (+/-) to the phase difference between the VCO and the reference input.

So you turn on the power supply. The VCO starts oscillating. The VCO feeds one input to the phase detector, the reference oscillator feeds the other input. The phase detector then tells the loop filter if the VCO frequency is too high or too low, and outputs an appropriate voltage. That voltage either charges UP or DOWN the integrator. As the integrator output moves either up or down, the VCO frequency does the same. Eventually the loop filter forces the VCO frequency, and then its phase, to "lock" to the reference input. That is the "DC feedback"

Rich


---------- Post added at 01:21 ---------- Previous post was at 00:50 ----------

Using OpAmp integrator in PLL is very common, and the integrator is dynamic against the VCO drifting duing to the temperature, voltage drifting, etc.
That circuit is much better than DC feedback.
Hi Tony
Could you please explain why active filter has advantages that the low pass filter itself? It is not clear to me.
Thanks

---------- Post added at 01:24 ---------- Previous post was at 01:21 ----------

There actually is DC feedback provided by the VCO/Phase detector.

Often there is a 'bleeder' resistor included to ensure cap starts out at zero volts.
Can you explain how the bleeder resistor work? Connect to ground and suddenly disconnect?
 

RCinFLA

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When the circuit is switched on, the lock will be quicker if there is not a residual bias on the capacitor. A high value resistor is placed across cap or input to output of op amp to drain the charge from cap in off mode. Reduces the possiblity of initially railing the op amp at turn on due to a residual charge on the integrator cap. It is not absolutely necessary as the phase detector DC component will eventually move the integrator into linear range.

The resistor must be high enough in value to not effect PLL loop dynamics. It limits the low frequency gain of the integrator.
 

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