Welcome to EDAboard.com

Welcome to our site! EDAboard.com is an international Electronic Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.

Register Log in

Analog Layout - Matching analysis

RodrigoSP

Newbie
Joined
Jun 30, 2020
Messages
3
Helped
0
Reputation
0
Reaction score
0
Trophy points
1
Activity points
38
Hi everyone,

I want to collect some inputs and maybe start a discussion here on what are your best practices when handling complex matching structures.

Often I see people struggling with complex matched MOS arrays on whether to simplify the pattern to have a cleaner routing and therefore less parasitics; or when to keep the pattern more distributed to improve the matching.
Since the parasitics can be easily extracted and backannotated, but the mismatch due to pattern and devices location not, how do you normally handle these two competing aspects?
 

Dominik Przyborowski

Advanced Member level 3
Joined
Jun 6, 2013
Messages
897
Helped
404
Reputation
808
Reaction score
393
Trophy points
1,343
Location
Norway
Activity points
6,733
Bsim4 introduces LOD and WPE, so placement is taken into account. The latest tools start to adding thermal effects as well.

What we have to guess is wafer gradients in doping or oxide thickness and this is arbitrarily decision.
 

timof

Advanced Member level 2
Joined
Feb 21, 2008
Messages
588
Helped
201
Reputation
402
Reaction score
190
Trophy points
1,323
Activity points
6,335
It's not so much about "less" parasitics, but about "matched" (or "weighted") parasitics.
Mismatch in parasitics can destroy matching of your devices or nets.
 

RodrigoSP

Newbie
Joined
Jun 30, 2020
Messages
3
Helped
0
Reputation
0
Reaction score
0
Trophy points
1
Activity points
38
It's not so much about "less" parasitics, but about "matched" (or "weighted") parasitics.
Mismatch in parasitics can destroy matching of your devices or nets.
Very good point. Thanks for bringing it up
 

timof

Advanced Member level 2
Joined
Feb 21, 2008
Messages
588
Helped
201
Reputation
402
Reaction score
190
Trophy points
1,323
Activity points
6,335
When matching requirements are stringent, like 1%, or 0.1%, or 0.01% - verifying parasitics matching is not an easy thing to do.
Even extraction tool accuracy comes into question, at this accuracy level (you can use a field solver option, to guarantee accuracy).
Next, C distribution over R network comes into question, and extraction tools can do a very poor job here.
 

Toggle Sidebar

Part and Inventory Search

Welcome to EDABoard.com

Sponsor

Top