Analog IC design in Windows environment

[mwpro]

Can anyone suggest packages for Analog IC design in Windows environment? Schematic Capture, Layout, LVS, RC extraction.

How good is these packages being supported by foundry?

Thanks.

 

[kbulusu]

hi, i guess ORCAD frm cadence has all the features u have asked for and it is windows based version.

 

[gfskao]

APLAC SOLUTION 761 IS THE BEST packages for Analog IC design in Windows environment

 

[mwpro]

APLAC is strong on schematic simulation. How about post layout RC extraction?

 

[Amuro]

OrCAD from Cadence is suit for Schematic and Simulation only since Layout option in this suite is for PCB, not IC layout. One of the complete suite in Windows based is from Tanner tool (S-Edit, T-spice and L-edit).

 

[Guest]

IC Design in Windows

I have used Orcad 9.2 for IC design in windows. It does a pretty good job but when I verified the results vs HSpice, Orcad was off by a few mV in a few spots. Tanner agreed with the Hspice results. I would take orcad results with a grain of salt.

 

[dd2001]

L-Edit

I never heard OrCAD can design IC, only PC version I herd is L-Edit. that is very good for some scale IC chips.

 

[flatulent]

OrCAD

OrCAD can do schematic capture and simulation (if you have the proper models) but not silicon layout. One problem with it is the limited MOS models that do not cover the modern short channel fets.

 

[sutapanaki]

What about mentor WG2002? I think its simulator supports a lot of MOS models. But I on't know how good a simulator it is. Anyone has an opinion?

 

[OpAmp]

You are able to design your IC with HSPICE, then use Ledit for Layout, LVS and circuit extraction. you should do the post-layout simulations with HSPICE

 

[leonqin]

Tanner : S-EDIT,L-EDIT,T-SPICE
MyChip, MyVhdl,etc

 

[jourval]

Mentor WG2002 is suitable for PCB design and integrity check only
(and Orcad too, btw ), so you can get output files as Gerber or postscript or dxf but never GDSII as you need for IC layout. All "converters" to GDSII is not work actually for serious design level - you'll need to check
every cell.
The most common design tool (PC-based) in this world is Tanner tools.

 

[goodboy_pl]

orcad is not so reliable for large ckts and even in small ckts may diverge but it is a good simulator for beginners.
HSPISE is the most accurete analog simulator available also for win.
for complete package that consists of schematic editor,simulator,waveform viewer,layout editor,extractor for win there are two optins:
T@nner edAs-edit,w-edit,tspice),(l-edit,lvs)
**broken link removed**

Silv@c0scholar schematic editor,smart spice,expert layout editor,Guardian physical verifier)
https://www.silvaco.com/

BEST!

 

[shiowjyh]

Suggestion only....
For Pure analog,
1.Use Cohesion System Designer as circuit schematic editor.
2.HSPICE would be the best choice for both pre-layout and post-layout simulation tool. However, if you are doing high resolution ADC or other large circuit design, convergence problem and time to get result become to your pain. Use NanoSim, Antrim or ADMS. Sorry, seems no windowns version.
3.Use Tanner Ledit for Layout, LVS ,DRC and circuit extraction. Somehow I did not know foundry does maintain design rule and command file for it because I am not using this tool, here I know a tool named MAGIC does.
For Mixed Mode,
1+2+3+4
4.Use LDV
5.Use Debussy


Regards,

Ryan

 

[computer_terminator]

@DS is another solution for analog ASIC design.
@DS + modelsim can be used in mixed mode design.

 

[cikyen]

Can anyone suggest packages for Analog IC design in Windows environment? Schematic Capture, Layout, LVS, RC extraction.

How good is these packages being supported by foundry?

Thanks.

For windows enviroment, I would suggest you try tanner tools.
I am not sure do they come with RC extraction, but I am sure you can do the schematic capture, layout/LVS, DRC and PnR there.

 

[BigBoss]

Ok but what about the parasitic extraction? What about the LVS ( Layout vs Schematic) what about the integration? What about the verification ?

There are many modules in Cadence and no company has reached to their level on IC design.

Don't forget that IC design is not ONLY designing schematic and simulation then layout..

Let me give you an example.. If you consider an amplifier that works at 2.45 GHz and you have obtained power level in your simulations 10dBm.
When you do parasitic extraction and use it in simulations you'll have 8.5 dBm optitmistic. ( depends on layout , it may be lower than )

You can not predict this value with other tools without parasitic extraction.

In additional to what you'll do ' proccess variations ' ? This is also very important. If your chip's al over behaviour varies by 10% , put it in a basket. It means that yo have lost your money..

For the time being , there is no Windows based Analog IC design tools.And Windows does not support 64 bit proccessors ( for the time being ) therefore simulations wil take incredibly long time.

Rgrds

 

[AMX]

I think you may try Tanner's tools.

 

[z17us]

Hi,

According to me the biggest problem is not the selection of the schematic or simulation tool, as much their integration. I mean the proper symbol libraries for the schematic capture and their appropriate models. Anyway a good idea is to start from a working environment (even with simple tools) and upgrade it slowly. Anyway everyone has its own way.

Good look!

 

[tekman]

Mentor Graphics EPD 3.0 can do schematic capture, simulation & output
spice netlist through proper library.