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Analog design in low supply voltage?

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GDF

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I would like to know anything I have to pay attention in low supply voltage analog design. Some people suggest folded or current-mode design to overcome this.
But what's the drawback of this kind of design?
In my personal opinion, the additional current source for blocking and biasing
generates additional noise which make circuit noisy.
Any other recommendation?
 

iamxo

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I see many people using floating gates tech to overcome low voltage supply problem.

or bulk driven, but not much.
 

swagata

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Current-mode designs actually yields large dynamic range & low power dissipiation.The processing and calibration steps for floating gate devices is also avoided.Input impedance reduction associated with Bulk input driven devices is also not necessary here.

You may also try your design using MITE(Multi Input Translinear Element) which is an emerging useful device.
Nowadays,for low-power low noise designs ,BiCMOS technology is strongly recommended.
 

GDF

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iamxo said:
I see many people using floating gates tech to overcome low voltage supply problem.

or bulk driven, but not much.
Does floating gates need additional special process?
 

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