Analog circuit model by Verilog -A/AMS or Verilog ?

[copper230230]

Dear All,
We want to co-sim for digital & analog. The digital was coded by verilog.
The analog BFM prepared to code with Verilog-A/AMS or pure Verilog-D,
but it wasn't determinded yet.
Could anyone tell me which one is run faster when I run co-sim?
The simulation tool is VCS + nano-sim.
Thanks!!

 

[philcorb]

Pure digital verilog will probably run faster. Verilog-a can have a few convergence issues, especially between blocks. Verilog-a blocks are easy to drop for analogue top level verification simulations. If you can model everything you want to model in verilog-d that would be my preferred solution.

 

[newmedia]

Philcorb,

How a analog circuit can be modeled in Verilog-D? Is it possible?

 

[philcorb]

Have a google for 'event driven analog'. There are also papers on this on IEEE explore. It is possible to clock a block at x10 the bandwidth of the analogue signals and make z-domain approximations to transfer functions. I have also seen models of PLLs which at phase noise.