# an question about using Micron sdram sim model!

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#### firendchn

##### Junior Member level 3
hi ,all

When I used the Micron mt48lc4m32b sim model in my SDRAM Controller,a surprise issue occured. That is when I execute write command(single write or burst write) to external SDRAM, when the actual burst length is smaller than the burst length set by sdram model mode register,and there are some idle operation between two write operations, some previous data will be overwrited by following data.
for example, I do some single write,
and the burst length is set 8 in mode register. I want to dump the data in memory with the $writememh() task. tbench code : write command (addr, data) s_w(32'h00000000,32'h22222222); id ; id; id; id; id; id; id; id; id; s_w(32'h00000004,32'h33333333); id ; id; id; id; id; id; id; id; id; s_w(32'h00000008,32'h44444444); id ; id; id; id; id; id; id; id; id; s_w(32'h0000000c,32'h5555555); id ; id; id; id; id; id; id; id; id; The data file got with$writememh() is :
ZZZZZZZZ
zzzzzzzz
zzzzzzzz
55555555
zzzzzzzz
zzzzzzzz
zzzzzzzz
zzzzzzzz
zzzzzzzz
zzzzzzzz
zzzzzzzz

I analyze the issue and I find in mt48lc4m32b.v sim modle burst_decoder task, the Col and col_temp relationship maybe cause the issue, So, I want to known the real memory device has the same issue or not? Or, have another cause?

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