An question about set_clock_uncertainty ???

[pengfan]

set_clock_uncertainty

DC constraint has the following constaint statement:

set_clock_uncertainty -setup 1.5 [get_clocks clk]

set_clock_uncertainty -hold 0.5 [get_clocks clk]　，

To setup time analysis ,why set_clock_uncertainty is 1.5 ?
but to hold time analysis,why the value of the set_clock_uncertainty is 0.5?

why the value of the set_clock_uncertainty is different ?

 

[rsrinivas]

set_clock_uncertainty

that is ur company standard
each company has it's own constraint policies.

regards
srinivas

 

[dcreddy1980]

about set_clock_uncertainty

Hi,

In general,

The variation u see in the constraints is due to "setup" check done by slow library and "hold" check done by fast library.

Regards,
dcreddy

 

[rjainv]

set_clock_uncertainty pll actel

DC constraint has the following constaint statement:

set_clock_uncertainty -setup 1.5 [get_clocks clk]

set_clock_uncertainty -hold 0.5 [get_clocks clk]　，

To setup time analysis ,why set_clock_uncertainty is 1.5 ?
but to hold time analysis,why the value of the set_clock_uncertainty is 0.5?

why the value of the set_clock_uncertainty is different ?

setup check is between two different clock edges. So cycle to cycle jitter from clock source is also added to uncertainity in addition to jitter due to clock path.

In hold, the check is against the same edge, hence cycle to cycle jitter doesn't matter. Hence you account only for jitter due to clock path. Hence uncertainity is much less.