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An array of registers for Time-to-Digital convert chip

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IceZero

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Hi,

In a controller I am designing for a Time-to-Digital convert chip, it asks that before being able to read time samples back from the chip, a bunch of registers are loaded with specific values.

I wrote the read/write controller for the chip and now I am writing a FSM to go into a Configure state. It will remain in this state until it has completely written data to all of the 12 registers on the chip.

My concern is not so much the FSM machine or how to do a write, but rather where can I store the values of these addresses. I was thinking something similar to an array of registers, which can be updated at any time, and it will loop through them sequentially and perform a write operation with the value.

Does something like this exist in FPGA and verilog? I was looking at BRAM on the Spartan 6 but I'm not entirely sure if that what I would need.

Cheers,

Andrei
 

willis...

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Re: An array of registers

Hi,

In a controller I am designing for a Time-to-Digital convert chip, it asks that before being able to read time samples back from the chip, a bunch of registers are loaded with specific values.

I wrote the read/write controller for the chip and now I am writing a FSM to go into a Configure state. It will remain in this state until it has completely written data to all of the 12 registers on the chip.

My concern is not so much the FSM machine or how to do a write, but rather where can I store the values of these addresses. I was thinking something similar to an array of registers, which can be updated at any time, and it will loop through them sequentially and perform a write operation with the value.

Does something like this exist in FPGA and verilog? I was looking at BRAM on the Spartan 6 but I'm not entirely sure if that what I would need.

Cheers,

Andrei

If you need a bunch of registers, why not just declare a bunch of vectors and use them as registers, populating them as necessary. For example...
Code:
signal register_1 :std_logic_vector (7 downto 0) := "00000000"; -- Declare and initialize register 1
signal register_2 :std_logic_vector (7 downto 0) := "00000000"; -- Declare and initialize register 2
signal register_3 :std_logic_vector (7 downto 0) := "00000000"; -- Declare and initialize register 3

Regards,
Willis
 

IceZero

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Re: An array of registers

Is the above code synthesizable? Also, I believe the initialize only works in simulation mode not in actual FPGA logic. Is this correct?
 

willis...

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Re: An array of registers

Is the above code synthesizable? Also, I believe the initialize only works in simulation mode not in actual FPGA logic. Is this correct?

The VHDL code above is synthesizeable. Should you wish, you can also initialize the register to 0 or to some other initial value manually...
Code:
register_1 <= "00000000";

Regards,
willis
 

K-J

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Re: An array of registers

Hi,

In a controller I am designing for a Time-to-Digital convert chip, it asks that before being able to read time samples back from the chip, a bunch of registers are loaded with specific values.

Presumably these specific values then are constants defined by the data sheet.

I wrote the read/write controller for the chip and now I am writing a FSM to go into a Configure state. It will remain in this state until it has completely written data to all of the 12 registers on the chip.

My concern is not so much the FSM machine or how to do a write, but rather where can I store the values of these addresses. I was thinking something similar to an array of registers, which can be updated at any time, and it will loop through them sequentially and perform a write operation with the value.

Does something like this exist in FPGA and verilog? I was looking at BRAM on the Spartan 6 but I'm not entirely sure if that what I would need.
You're on the right track but actually those register values would be an array of constants. Willis' post should have shown the array of registers as 'constant' not 'signal'. So now the 'storage' of those values will be implemented with logic. If all of the registers happen to need to be written with some single constant that logic will be quite minimal. On the other hand, if these register values are some wildly arbitrary values, it might be better to define these constants to be implemented in memory rather than logic. Search for the coding template for defining read only memory, it will likely look something like this...

Code:
process(clock)
  -- Declare the format and values of the array of constants 
  type t_my_table is array(0 to 11) of natural range 0 to 255; -- Or use std_logic_vector(7 downto 0) rather than natural range 0 to 255 if you prefer
  constant my_table:  t_my_table := (55, 10, 18, 0, 0, 55, 31, 250, 0, 0, 1, 12);
begin
  if rising_edge(clock) then
    data_out <= my_table(address);  -- Assuming address and data_out to be type natural.  If something else, then add type conversions as appropriate
  end if;
end process;

If you want to implement this in logic, then simply strip out all of the 'process' stuff and write it as
Code:
    data_out <= my_table(address);  -- Assuming address and data_out to be type natural.  If something else, then add type conversions as appropriate

Kevin Jennings
 

willis...

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Re: An array of registers

If you declare the registers as constants instead of signals then they are no longer writeable? Or maybe I am misunderstanding what you said.
Are you saying that ....
Code:
signal register_1 : std_logic_vector (7 downto 0) := "00000000";
should be changed to ...
Code:
constant register_1 : std_logic_vector (7 downto 0) := "00000000";
If you want to then update the value then you can no longer write to register_1.

-Willis
 

K-J

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Re: An array of registers

If you declare the registers as constants instead of signals then they are no longer writeable? Or maybe I am misunderstanding what you said.

The original post stated...(emphasis mine)

In a controller I am designing for a Time-to-Digital convert chip, it asks that before being able to read time samples back from the chip, a bunch of registers are loaded with specific values.

I believe the task at hand is how to define the list of 'specific values' that are going to be written to the chip (unless I'm misunderstanding the original post). For that task, my post shows a couple of solutions. The 'array of registers' is located in the 'Time-to-Digital convert chip', not in the FPGA that is controlling that chip. But it is up to the FPGA to get those 'specific values' downloaded to the 'Time-to-Digital convert chip' before that chip is ready to go.

What you posted is a solution for something where the 'array of registers' is actually in the FPGA. But having them in the FPGA does not get them into the 'Time-to-Digital convert chip'.

Kevin Jennings
 

willis...

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Re: An array of registers

The original post stated...(emphasis mine)



I believe the task at hand is how to define the list of 'specific values' that are going to be written to the chip (unless I'm misunderstanding the original post). For that task, my post shows a couple of solutions. The 'array of registers' is located in the 'Time-to-Digital convert chip', not in the FPGA that is controlling that chip. But it is up to the FPGA to get those 'specific values' downloaded to the 'Time-to-Digital convert chip' before that chip is ready to go.

What you posted is a solution for something where the 'array of registers' is actually in the FPGA. But having them in the FPGA does not get them into the 'Time-to-Digital convert chip'.

Kevin Jennings

Oh okay I understand. My mistake.

Regards,
Willis
 

IceZero

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Re: An array of registers

Thanks Kevin. You understood my problem perfectly. The registers are on the TDC chip and it is the goal of the FPGA to have some predefined values which are then subsequently written to the TDC registers. For this reason (among others), I wrote the read/write controller.
 

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