Continue to Site

Welcome to EDAboard.com

Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.

[SOLVED] Altium: I want no protection over track in ALTIUM

Status
Not open for further replies.

zivoradbre

Junior Member level 1
Junior Member level 1
Joined
Mar 26, 2013
Messages
18
Helped
0
Reputation
0
Reaction score
0
Trophy points
1,281
Visit site
Activity points
1,407
Hello,

Local PCB fabrication company offers protective layer over PCB's tracks. I want that some tracks (power tracks) stay unprotected so I can add tin for better current performance.
How to do that in Altium?

Thanks...
 

I assume that by protection, you're referring to the application of soldermask on top of the pcb tracks. The soldermask layer in Altium is a "negative" layer meaning that any regions of solid color on that layer indicate the absence of soldermask. So placing fills, lines, regions, polygons, etc on the soldermask layer will expose the surface metal finish underneath. The pads of your parts should already have a soldermask expansion on them by default, so you should only need to add the extra areas that you want exposed.

The easiest approach is to use a fill on the soldermask layer, but if you want it to look a little cleaner, you can copy the tracks from the copper layer to the soldermask layer, and expand the track width on the soldermask layer by the desired additional clearance on each side of the track. Your layer drawing order may hide your soldermask in some cases, so it's best to view the board in 3D if possible to verfiy the soldermask is the way you want it. If you don't have 3D support, view the soldermask layer in single layer mode.

Good luck.
 

I assume that by protection, you're referring to the application of soldermask on top of the pcb tracks. The soldermask layer in Altium is a "negative" layer meaning that any regions of solid color on that layer indicate the absence of soldermask. So placing fills, lines, regions, polygons, etc on the soldermask layer will expose the surface metal finish underneath. The pads of your parts should already have a soldermask expansion on them by default, so you should only need to add the extra areas that you want exposed.

The easiest approach is to use a fill on the soldermask layer, but if you want it to look a little cleaner, you can copy the tracks from the copper layer to the soldermask layer, and expand the track width on the soldermask layer by the desired additional clearance on each side of the track. Your layer drawing order may hide your soldermask in some cases, so it's best to view the board in 3D if possible to verfiy the soldermask is the way you want it. If you don't have 3D support, view the soldermask layer in single layer mode.

Good luck.

Thank you for answering. I understand you what you talking. In Altium there are two layers that acts like soldermask: top paste and top solder. Which one I have to use to achieve my goal? I assume that top paste is used only for making stencil masks, so adding copied track changed to be in top solder layer is enough.
Am I right?

Greetings
 

You only need to make changes/additions to the 'top solder' layer to define what portions of the top surface of the board you want to have exposed metal finish. There is also a 'bottom solder' layer as well if you have any changes you would like to make to the bottom solder mask.

Your assumption about the paste layer is correct. The 'top paste' layer is a positive layer and all solid regions will specify where the actual solder paste is deposited on your paste stencil during assembly. If you want these tracks to be automatically tinned during your assembly process, you could add fills or copy tracks to your paste layer, but I assume that you don't want this. Like the solder layer, your component pads should have paste expansion defined by default. FYI, the paste layer isn't viewable in 3D mode as far as I know, so it's best to view and verfiy that data in normal 2D single-layer mode. If you add paste info by hand, always make sure your soldermask is exposed beneath the paste, or else you may end up with paste on mask.

P.S. If you want higher current capacity for your traces, you may want to specify a thicker base copper and plating during the board fab and leave the soldermask as is. But I use the above process for all of my RF tracks to eliminate the dielectric of the soldermask on top of the trace. Keep in mind that you may want to leave some soldermask to serve as a solder dam around each component pad.

Good luck.
 

Thank you very much. Some PCB companies has maximum copper thickness and in our case that's not enough since our design is intended for power application. If u doing RF design u don't have to think about that :)

Thank you again, greetings
 

Status
Not open for further replies.

Part and Inventory Search

Welcome to EDABoard.com

Sponsor

Back
Top