The board is most likely manually routed. Manual routing will always give you the best results. Autorouters just find the shortest route between two points, and can't anticipate things like underlying plane splits, or analog and digital return paths - unless you set up such things in routing constraints. By the time you've done that, you might as well have laid the track by hand.
I think the designer did a pretty good job, but I would have used fewer polygon pours. It's possible he or she used so much copper because there's no shielded enclosure. There could have been a problem meeting the EMC requirements.
My guess would be about 3 weeks to route a board like this. It depends on how many footprints had to be custom made, and how many were already available in existing libraries. A lot of time in laying out a board is spent doing component data research.
Any design software can do "team based design". I personally don't believe in it. It's like the old saying, "an elephant is a camel designed by a team". There are several companies who keep their designs on a server, and each member of the "team" takes turns working on the board. AD lets you lock out a file so others can view it, but only the first person to open it can actively edit. In that way, conflicting edits are prevented.
Analyze net is just what is sounds like - it does a signal integrity analysis of the selected net or nets.