Jul 31, 2008 #1 B braveprasanna Newbie level 4 Joined Jun 5, 2008 Messages 7 Helped 0 Reputation 0 Reaction score 0 Trophy points 1,281 Activity points 1,328 After did synthesise the HDL codings will be converted into which format? and what is the back end of VLSI? any body please let me learn
After did synthesise the HDL codings will be converted into which format? and what is the back end of VLSI? any body please let me learn
Jul 31, 2008 #2 R research_vlsi Advanced Member level 4 Joined Nov 15, 2006 Messages 108 Helped 11 Reputation 22 Reaction score 7 Trophy points 1,298 Activity points 1,902 After synthesis HDL is converted into optimized gate level Netlist. for better understanding u can read xilinx synthesis guide. regarding backend this the flow
After synthesis HDL is converted into optimized gate level Netlist. for better understanding u can read xilinx synthesis guide. regarding backend this the flow
Jul 31, 2008 #3 avimit Banned Joined Nov 16, 2005 Messages 412 Helped 91 Reputation 182 Reaction score 23 Trophy points 1,298 Location Fleet, UK Activity points 0 I suggest you read the following: http://www.vlsiip.com/asic_dictionary/S/synthesis.html
Sep 4, 2008 #4 S satish_mahankali Newbie level 3 Joined Jun 9, 2008 Messages 4 Helped 0 Reputation 0 Reaction score 0 Trophy points 1,281 Activity points 1,299 usually gate level net list..if u r using ISE then .ngc format....