AES Application - ACTEL FUSION FPGA- 40 points for help

[oursriharsha]

actel fusion

Hello

I m currently interested in coming up with a Small application based on AES to implement and verify through ACTEL FPGA - Fusion device.

How one can show the encryption and decryption ?

Can anyone give me some more idea as i am a lay man regarding this.

Please do help me out with ideas !!

 

[tariq786]

aes application

You need to go to www.opencores.org and search under crypto for aes. The smallest one and easiest one to understand is by Rudolph Usselman.

 

[oursriharsha]

fpga aes

Nice to see the replies , but dear friends,
i need some ideas how i can demonstrate the same.
Usage and availability of cores, i agree that they are available on the opencores.

Kudos tariq, for the suggestion of the easy one,

 

[pev]

aes fpga

May I sugest you program up a COM port (in JAVA or C) instead of using Hyperterminal (a real pain the the arss to do anything cleaver with - you'll save a lot of time in the long run).

(COM port use RS232 look the standard up
- you may need to do voltage conversion with a chip if it's not already on the board
- Do not do any hardware flow control, well ive never had to anyway)

First setp is to test the TX UART and RX UART indivdualy. (these fun to make yourself) (probably use Hyperterminal to test these indepent from your program).

Your also going to want to have the option of testing the encryptor and deccryptor individualy.

Also if your going to make your own COM port program keep a log file of what was sent and received for use in your HDL simulations (it's very sexy trust me ;-) ). But you'll want to increase the BAUD rat as much as possible in the simulation so it doesn't take forever.

Your project sounds like fun


PS: not after the points (I don't know what they do anyway)

 

[oursriharsha]

application of fpga

I need still some more ideas on this AES
PLZ!

 

[khamitkar.ravikant]

actel fusion design ideas

You can do one thing design the interface using VB or .net on your PC and communicate it with ur kit which
will then be used to send stream of data any kind of or a specific tye of file and gui will display the results .
and u can do one more thing in that u can store intermediate results on u r pc and
at the time of decryption u will send the stored file (decrypted) to kit and again get plain text back
also u cna make input for 128bit , 256 bit or 192bit key input and any size of data
which get sliced in 128bit format..

if any problem u can ask......
i already implemented all these stuff suing Spartan3E kit of xilinx.

thanks and regards

 

[shitansh]

fusion-fpga

Hi oursriharsha,

are you able to encrypt your source code( Verilog or VHDL ) and work with out any problem with ACTEL environment?

--
Shitansh Vaghela

 

[AESdemo]

Re: actel fusion design ideas

You can do one thing design the interface using VB or .net on your PC and communicate it with ur kit which
will then be used to send stream of data any kind of or a specific tye of file and gui will display the results .
and u can do one more thing in that u can store intermediate results on u r pc and
at the time of decryption u will send the stored file (decrypted) to kit and again get plain text back
also u cna make input for 128bit , 256 bit or 192bit key input and any size of data
which get sliced in 128bit format..

if any problem u can ask......
i already implemented all these stuff suing Spartan3E kit of xilinx.

thanks and regards

Hi!
i have implemented AES encryption and decryption algo on FPGA using verilog. I have simulated the result of encryption module, the problem that i am facing is in the simulation of Decryption module.How can i get the correct result?Also what if i want to send the input from matlab to FPGA board and get back the decrypted data from FPGA otno Matlab?
Thanks and regards