liletian
Full Member level 6
ads transient
when I extracted layout file and resimulation, it reported the following error? Does anyone have same problem before? Any suggestions? Also if I just extracted C instead of RC, it works fine without error. I suspect it does not converge. Any suggestions to fix it?
Thanks
TRAN Tran1[1] <input.ckt> time=(0 s->500 ns)
/apps/ADS2006A/bin/adsrunsim: line 69: 364 Aborted hpeesofsim -a $ARGS
ds2psf was unsuccessful. PSF files are not available for this simulation.
hpeesofsim (*) 2006A.400 Sep 24 2006 (built: 09/24/06 00:02:10)
Copyright Agilent Technologies, 1989-2006.
Loading Verilog-A module 'dgmosvarcap' from
'/home/ymzhai/hpeesof/agilent-model-cache/cml/1.34/linux_x86/models_08978_20080109_141701_1804289383/lib.linux_x86/mvcapdg.cml'.
Loading Verilog-A module 'havarcap' from
'/home/ymzhai/hpeesof/agilent-model-cache/cml/1.34/linux_x86/models_08978_20080109_141701_1804289383/lib.linux_x86/hacap.cml'.
Loading Verilog-A module 'mosvarcap' from
'/home/ymzhai/hpeesof/agilent-model-cache/cml/1.34/linux_x86/models_08978_20080109_141701_1804289383/lib.linux_x86/mvcap.cml'.
Warning detected by hpeesofsim during netlist flattening.
Resistor `I127.I106_I0_3__rcx.r1' is shorted.
Warning detected by hpeesofsim during netlist flattening.
Resistor `I127.I106_I0_2__rcx.r1' is shorted.
Warning detected by hpeesofsim during netlist flattening.
Resistor `I127.I106_I0_1__rcx.r1' is shorted.
Warning detected by hpeesofsim during netlist flattening.
Resistor `I127.I106_I0.r1' is shorted.
Warning detected by hpeesofsim during netlist flattening.
Resistor `I127.I103_I16_I3.r1' is shorted.
Warning detected by hpeesofsim during netlist flattening.
Resistor `I127.I103_I42_I18_I13.r1' is shorted.
Warning detected by hpeesofsim during netlist flattening.
Resistor `I127.I103_I42_I38_I39.r1' is shorted.
Warning detected by hpeesofsim during netlist flattening.
Resistor `I127.I103_I42_I29_I28.r1' is shorted.
Warning detected by hpeesofsim during netlist flattening.
Resistor `I127.I103_I42_I43_I0.r1' is shorted.
Warning detected by hpeesofsim during netlist flattening.
Resistor `I127.I103_I101.r1' is shorted.
Warning detected by hpeesofsim in topology check during circuit set up.
Number of nodes with only one device attached (topology corrected): 63
Number of nodes with no DC path to ground (topology corrected): 63
when I extracted layout file and resimulation, it reported the following error? Does anyone have same problem before? Any suggestions? Also if I just extracted C instead of RC, it works fine without error. I suspect it does not converge. Any suggestions to fix it?
Thanks
TRAN Tran1[1] <input.ckt> time=(0 s->500 ns)
/apps/ADS2006A/bin/adsrunsim: line 69: 364 Aborted hpeesofsim -a $ARGS
ds2psf was unsuccessful. PSF files are not available for this simulation.
hpeesofsim (*) 2006A.400 Sep 24 2006 (built: 09/24/06 00:02:10)
Copyright Agilent Technologies, 1989-2006.
Loading Verilog-A module 'dgmosvarcap' from
'/home/ymzhai/hpeesof/agilent-model-cache/cml/1.34/linux_x86/models_08978_20080109_141701_1804289383/lib.linux_x86/mvcapdg.cml'.
Loading Verilog-A module 'havarcap' from
'/home/ymzhai/hpeesof/agilent-model-cache/cml/1.34/linux_x86/models_08978_20080109_141701_1804289383/lib.linux_x86/hacap.cml'.
Loading Verilog-A module 'mosvarcap' from
'/home/ymzhai/hpeesof/agilent-model-cache/cml/1.34/linux_x86/models_08978_20080109_141701_1804289383/lib.linux_x86/mvcap.cml'.
Warning detected by hpeesofsim during netlist flattening.
Resistor `I127.I106_I0_3__rcx.r1' is shorted.
Warning detected by hpeesofsim during netlist flattening.
Resistor `I127.I106_I0_2__rcx.r1' is shorted.
Warning detected by hpeesofsim during netlist flattening.
Resistor `I127.I106_I0_1__rcx.r1' is shorted.
Warning detected by hpeesofsim during netlist flattening.
Resistor `I127.I106_I0.r1' is shorted.
Warning detected by hpeesofsim during netlist flattening.
Resistor `I127.I103_I16_I3.r1' is shorted.
Warning detected by hpeesofsim during netlist flattening.
Resistor `I127.I103_I42_I18_I13.r1' is shorted.
Warning detected by hpeesofsim during netlist flattening.
Resistor `I127.I103_I42_I38_I39.r1' is shorted.
Warning detected by hpeesofsim during netlist flattening.
Resistor `I127.I103_I42_I29_I28.r1' is shorted.
Warning detected by hpeesofsim during netlist flattening.
Resistor `I127.I103_I42_I43_I0.r1' is shorted.
Warning detected by hpeesofsim during netlist flattening.
Resistor `I127.I103_I101.r1' is shorted.
Warning detected by hpeesofsim in topology check during circuit set up.
Number of nodes with only one device attached (topology corrected): 63
Number of nodes with no DC path to ground (topology corrected): 63