I am currently designing a 10bit 37MHZ pipelined ADC.
I wonder should I add AS,AD,PS,PD in the S/H & first stage comparator,MDAC.
Any body could give me some advice?
When should I concern the mos parasitic cap of AS/AD/PS/PD ?
If you do not include these parameters your simulations will not be accurate because the junction parasitics are very important in todays technologies.
For an accurate simulation they are very necessary, but you don't know them before you do the layout. So, the flow IMHO is like this:
- do the simulations at the design step, but overdesign the circuit in terms of speed (20-50% more, let's say);
- try to evaluate areas and perimeters by drawing some transistors in layout, and run the simulation again with the new data.
- do the layout, extract, try again.