Continue to Site

Welcome to EDAboard.com

Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.

ADC sampling rate question

Status
Not open for further replies.

a8811323

Newbie level 6
Joined
Nov 17, 2014
Messages
11
Helped
0
Reputation
0
Reaction score
0
Trophy points
1
Activity points
122
Hi,
It may look stupid. I am just wondering will the reference voltage affect the sampling speed? In order words, can a ADC at Vref=2V has the same sample rate as the ADC at Vref=3.3V?

I think it will not affect the speed, only operating frequency and resolution of the ADC do. Correct me if I am wrong.

Thanks
 

Hi,

I can't think of a reason that VRef has an influence on max sample rate.
But if there is an issue or relationship you surely will find the information in the datasheet. Either as text or as a chart.

Klaus
 

I'm interested...

Isn't sampling rate based on the clock you set with RC or a crstal or external clock, and the integrating resistor and capacitor?
 
Klaus is correct. There may be be issues with the slew rate and output impedance of circuits providing the voltage to the ADC input but from there onward the sampling rate is only dependant on the type of ADC and with the exception of flash converters, it's clock rate. Vref only changes the full-scale voltage the ADC can measure up to.

Brian.
 
Unless there is a slew rate problem at larger voltage swings at xx nanosecond transition times in the S&H circuit (unlikely) it is irrelevant.

ALso consider if ADC has an OP AMP for user input gain control, if there is a spec for GBW product in the ADC input. ( but unlikely)
 

Status
Not open for further replies.

Similar threads

Part and Inventory Search

Welcome to EDABoard.com

Sponsor

Back
Top