ADC reference voltage circuit

[Lantis]

I have designed a 6bit Pipelined ADC. However, I got some problem when i design the reference voltage circuit.
Because I have no output pad for VREFP(1.75V) and VREFN (1.25V) , so I add a large cap (about 400pF) on chip. I wonder which kind of OPAMP I should use.
For a one stage( folded) opamp, the large cap let the bandwidth very low ( about 1K~100KHz), the vreference voltage will be changed when the clock are switching, and the reference voltage recoverd very slowly.

So I used two stage opamp, and used a resistor seriesed with the miller capacitance so as to cancel the output pole. The BW is much larger than the folded ones.

I am not sure it will be work or failed. PLz give me some advice!! Thanks!!!

 

[marshel]

hi lantis.
In my option, for the chips have VREN Pin and connecting a cap outside, they normaly have a internal resistor with value about tens of k ohms. then FREFN is bufftered. So your amp don't need to dirve the cap directly.

 

[Lantis]

Thanks for your replying.
However, I did not have a VREF Pin outside the chip.

 

[sunking]

1. reduce the cap(50p) for fold cascode
2. if the cap cannt be samll, use two stage, but be careful the PM

 

[marshel]

hi,maybe I got a misunderstanding.
what's the purpose of the 400p cap?

 

[tmchen00]

I think you just need to fix the difference voltage of VREFP and VREFN.
If both of them change when clock is switching(clock feedthrough),
you don't need to take care of reference voltage recover time, right?

 

[sunking]

the purpose of the 400p cap is for low noise and low ripple

 

[marshel]

If the purpose of the 400p cap is for low noise and no ripple, there would be a resistor in series with the cap.So, why the op amp need drive the cap directly?