ADC noise while generating high frequency clock

[manalody2]

Hi,

The scenario is that while I am generating some high frequency clock say 1 Mhz through capture compare pins, some distortion( noises) got added into ADC pins . Because of that the ADC values are not stable. Do you have any suggestion to avoid that. If the clock pin is open the distortion is not there But a wire is connected to that pin it cause of lots of noise.

Regards

Sunil

---------- Post added at 06:36 ---------- Previous post was at 06:33 ----------

This is due to inductive radiance. If we use shielded wire for clock signal we can avoid the noise to a great extend. we don't want to use shielded wire some how want to avoid the noise from ADC

 

[eklikeroomys]

Are you separating your analog and digital grounds for the ADC? You might me getting noise in your analog ground caused by the fast switching digital clock. Check to see if your analog ground potential is stable, this could just be the problem.

 

[manalody2]

I have tried to isolate the Digital and Analog ground. the board is having lots of free floating pins which seems to be working as an antenna. If a open end wire is connected to the Clock pin itself causing noise. So i am just stuck in what i am doing. give some suggestion.

 

[eklikeroomys]

Have you considered using a lower frequency? Or you will have to look into mixed signal design techniques