Continue to Site

Welcome to EDAboard.com

Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.

ADC Input Buffer in 0.18um CMOS

Status
Not open for further replies.

ozgura2

Newbie level 4
Joined
Sep 2, 2009
Messages
5
Helped
3
Reputation
6
Reaction score
0
Trophy points
1,281
Location
Turkey
Activity points
1,312
analog to digital converter input buffer

Hi,

I want to drive the Bootstrapped Switch Track and Hold circuit for a 1.5Gs/s, 8 bit CMOS ADC. For 0.18um CMOS process, normal source follower buffer has linearity and gain drawbacks because MOS transistor's output conductance is strongly nonlinear for minimum device length. I tried to compensate the NMOS transistor's output conductance change by driving its drain with a PMOS source follower but I can not get a good performance. Also it seems very high tail current is needed to properly drive the bootstrapped switch. Is there any alternative buffer circuit with high speed, linearity and gain performance?

Thanks,
Ozgur
 

transistor buffer adc

At that frequency the only closed loop amp that has a
prayer, I think is a current-feedback amplifier. But on
Jazz 0.18 we see hundreds of MHz full power bandwidth
(in simulations), not GHz.

This is one of several reasons, why many ADCs do not
integrate the buffer amp - better it be left as Somebody
Else's Problem.
 

Status
Not open for further replies.

Part and Inventory Search

Welcome to EDABoard.com

Sponsor

Back
Top