ozgura2
Newbie level 4
analog to digital converter input buffer
Hi,
I want to drive the Bootstrapped Switch Track and Hold circuit for a 1.5Gs/s, 8 bit CMOS ADC. For 0.18um CMOS process, normal source follower buffer has linearity and gain drawbacks because MOS transistor's output conductance is strongly nonlinear for minimum device length. I tried to compensate the NMOS transistor's output conductance change by driving its drain with a PMOS source follower but I can not get a good performance. Also it seems very high tail current is needed to properly drive the bootstrapped switch. Is there any alternative buffer circuit with high speed, linearity and gain performance?
Thanks,
Ozgur
Hi,
I want to drive the Bootstrapped Switch Track and Hold circuit for a 1.5Gs/s, 8 bit CMOS ADC. For 0.18um CMOS process, normal source follower buffer has linearity and gain drawbacks because MOS transistor's output conductance is strongly nonlinear for minimum device length. I tried to compensate the NMOS transistor's output conductance change by driving its drain with a PMOS source follower but I can not get a good performance. Also it seems very high tail current is needed to properly drive the bootstrapped switch. Is there any alternative buffer circuit with high speed, linearity and gain performance?
Thanks,
Ozgur