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ADC input buffer in 0.18um CMOS for 250MHz input

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xy85061182

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Hi,
I want to driver a Bootstrapped Switch Track and Hold circuit for a 250MHz input,so I use a source follower for high linearity,and use another source follower to dirver the drain,but the SFDR is bad because the third Harmonic is high.Can anybody tells me how to modify the circuit or the related information.I don't want to change the application environment and the tail current.Thanks.
 

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