ADC and DAC input range

[JanniS]

Hello

I am currently working on a 8-bit ADC. So far i chose the current steering DAC due to low mismatch gradient. During my transient simulations I just disvovered that the converter struggels as the output passes 1 V. The supply is single supply at 3.6 V and the input range is specified to be 0-2 V.

Then i read in my book:
"As a rule of thumb, in a single-supply environment with core supply VDD, the maximum single-ended output voltage for high-linearity applications is typically limited to one quarter of VDD."

I tried to google this or find papers regarding this, but I did not find anything. My question is if any of you have experiences regarding this?
My plan is now to implement the DAC with capacitors instead of current sources, but I just want to make sure that this is really the case for the current steering DAC.

I know that 8-bit may not be considered high-resolution, but I still find it strange that it is not possible. I implemented the current mirror with cascodes in pMOS in 0.18 nm process, and the threshold voltage for these devices is around 0.7 V.

Thanks,
Janni

 

[gag2000]

I guess you are working on SAR ADC as you use
Difficult to guess without detailed schematic. Avec you checked your current source only with 1V output ?