anindya
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ENTITY MOORE IS
PORT(A,CLK,RST:IN BIT;
F:OUT BIT);
END MOORE;
ARCHITECTURE FSMOF MOORE IS
SUBTYPE STATE_TYPE IS STD_
LOGIC_VECTOR (2DOWNTO 0);
SIGNAL STATE:STATE_TYPE;
CONSTANT S0:
STATE_TYPE:="001";
CONSTANT S1:
STATE_TYPE:="010";
CONSTANT S2:
STATE_TYPE:="100";
SIGNAL CURRENT_STATE,
NEXT_STATE :STATE_TYPE;
BEGIN
FFROCESS (CLK,RST)BEGIN
IF (RST=’1’)THEN
CURRENT_STATE <=S0 ;
ELSIF (CLK’EVENT AND CLK=’1’)
THEN
CURRENT_STATE<=NEXT_STATE;
END IF ;
END PROCESS FF ;
LOGICROCESS (A,
CURRENT_STATE)BEGIN
CASE CURRENT_STATE IS
WHEN S0=>F <= ’0’;
IF (A=’0’)THEN
NEXT_STATE <=S 0;
ELSE
NEXT_STATE <=S1;
END IF;
WHEN S1=>F <= ’0’;
IF (A=’0’)THEN
NEXT_STATE <=S2;
ELSE
NEXT_STATE <=S1;
END IF;
WHEN S2=>F <= ’1’;
IF (A=’0’)THEN
NEXT_STATE <=S0;
ELSE
NEXT_STATE <=S1;
END IF;
WHEN OTHERS =>
CURRENT_STATE <=S0;
END CASE;
END PROCESS;
END FSM ;
the Question is at run time how can i access the state register having So/S1 for diagnostic purposes ?
PORT(A,CLK,RST:IN BIT;
F:OUT BIT);
END MOORE;
ARCHITECTURE FSMOF MOORE IS
SUBTYPE STATE_TYPE IS STD_
LOGIC_VECTOR (2DOWNTO 0);
SIGNAL STATE:STATE_TYPE;
CONSTANT S0:
STATE_TYPE:="001";
CONSTANT S1:
STATE_TYPE:="010";
CONSTANT S2:
STATE_TYPE:="100";
SIGNAL CURRENT_STATE,
NEXT_STATE :STATE_TYPE;
BEGIN
FFROCESS (CLK,RST)BEGIN
IF (RST=’1’)THEN
CURRENT_STATE <=S0 ;
ELSIF (CLK’EVENT AND CLK=’1’)
THEN
CURRENT_STATE<=NEXT_STATE;
END IF ;
END PROCESS FF ;
LOGICROCESS (A,
CURRENT_STATE)BEGIN
CASE CURRENT_STATE IS
WHEN S0=>F <= ’0’;
IF (A=’0’)THEN
NEXT_STATE <=S 0;
ELSE
NEXT_STATE <=S1;
END IF;
WHEN S1=>F <= ’0’;
IF (A=’0’)THEN
NEXT_STATE <=S2;
ELSE
NEXT_STATE <=S1;
END IF;
WHEN S2=>F <= ’1’;
IF (A=’0’)THEN
NEXT_STATE <=S0;
ELSE
NEXT_STATE <=S1;
END IF;
WHEN OTHERS =>
CURRENT_STATE <=S0;
END CASE;
END PROCESS;
END FSM ;
the Question is at run time how can i access the state register having So/S1 for diagnostic purposes ?