About the center tap capacitor and resistor in IBM90nm

[sendy]

Hi All,

I am a newer for IBM 90nm process. In its PDK, the capacitors and resistors all have three terminals. I am just not sure how to connect the third terminal in the schematic, also in the layout.

Also, when I set up the capacitance value of the capacitor, I found we need to set up the length and width values and the software will give you the maximum and minimum capacitance value but not the exact capacitance value. How can I know if I set up the right capacitance value for the capacitor?



Could anyone tell me how to use those resistors and capacitors?

Thanks,

 

[BradtheRad]

The top row could be variable capacitors. However the symbols do not match the traditional symbol which has an arrow going through the middle. The minimum and maximum values are its tunable range.

The bottom row is the typical symbol for potentiometers. Variable resistors.

Somewhere your application must have symbols for ordinary capacitors and resistors. 2 terminal type.

I have only a few 3-terminal capacitors scavenged from old circuit boards. They are two capacitors with one common pin. It doesn't have a unique symbol since it's electrically the same as two capacitors.

 

[Teddy]

To be honest I did not use the IBM kit yet. But in general 3 terminals on caps are: + - and substrate under. The answer is in the model file. If you look into subcircuit definition in models you will find your answer.
Same thing for resistors - the model is using substrate connection because it usualy splits resistor to pi model C-R-C type device to model parasitics.

 

[dgnani]

Teddy got it right, in IBM PDKs the third terminal is the well under the passive device and it is used to model parasitics.

I have used 130nm and 65nm and both show the value of the cap after setting geometry, make sure your PDK environment is in good shape, e.g, CXt file loaded in .cdsinit

 

[oermens]

I am just not sure how to connect the third terminal in the schematic, also in the layout.

connect to substrate potential

Also, when I set up the capacitance value of the capacitor, I found we need to set up the length and width values and the software will give you the maximum and minimum capacitance value but not the exact capacitance value. How can I know if I set up the right capacitance value for the capacitor?

dgncap and ncap are varactors not fixed capacitors.

i would advise you to use the MOSIS user group forum for this kit, and refrain from posting any specific information of a foundry process to a public forum as you are surely bound by an NDA with the foundry. **broken link removed**

 

[dgnani]

connect to substrate potential


dgncap and ncap are varactors not fixed capacitors.

i would advise you to use the MOSIS user group forum for this kit, and refrain from posting any specific information of a foundry process to a public forum as you are surely bound by an NDA with the foundry. **broken link removed**

the third terminal is connected to the potential of the well under the device which is not necessarily substrate (it can be an nwell...)

dgncap and ncap are also designed to be used as decoupling caps

 

[oermens]

the third terminal is connected to the potential of the well under the device which is not necessarily substrate (it can be an nwell...)

True, thanks for correcting.

dgncap and ncap are also designed to be used as decoupling caps

Also correct.